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| author | Inès Varhol <ines.varhol@telecom-paris.fr> | 2024-07-07 10:58:55 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-07-11 11:41:34 +0100 |
| commit | 29f0bef71a80d05cd19b95fce93833383c2b9aa2 (patch) | |
| tree | 3f0f863003bc3bfb77ed094e420694e4161c2f6f /scripts | |
| parent | bc080002cea5893fcbb0e651f6482f27a19356fb (diff) | |
| download | qemu-29f0bef71a80d05cd19b95fce93833383c2b9aa2.zip qemu-29f0bef71a80d05cd19b95fce93833383c2b9aa2.tar.gz qemu-29f0bef71a80d05cd19b95fce93833383c2b9aa2.tar.bz2 | |
hw/arm: In STM32L4x5 SOC, connect USART devices to EXTI
The USART devices were previously connecting their outbound IRQs
directly to the CPU because the EXTI wasn't handling direct lines
interrupts.
Now the USART connects to the EXTI inbound GPIOs, and the EXTI connects
its IRQs to the CPU.
The existing QTest for the USART (tests/qtest/stm32l4x5_usart-test.c)
checks that USART1_IRQ in the CPU is pending when expected so it
confirms that the connection through the EXTI still works.
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240707085927.122867-4-ines.varhol@telecom-paris.fr
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions