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authorPeter Maydell <peter.maydell@linaro.org>2023-06-19 11:20:18 +0100
committerPeter Maydell <peter.maydell@linaro.org>2023-06-19 11:20:18 +0100
commit7e2788471f9e079fff696a694721a7d41a451839 (patch)
treeb08e0d20f068d69f02eb3f54f29a45ef12dc3420 /scripts/vmstate-static-checker.py
parent243705aa6ea3465b20e9f5a8bfcf36d3153f3c10 (diff)
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target/arm: Return correct result for LDG when ATA=0
The LDG instruction loads the tag from a memory address (identified by [Xn + offset]), and then merges that tag into the destination register Xt. We implemented this correctly for the case when allocation tags are enabled, but didn't get it right when ATA=0: instead of merging the tag bits into Xt, we merged them into the memory address [Xn + offset] and then set Xt to that. Merge the tag bits into the old Xt value, as they should be. Cc: qemu-stable@nongnu.org Fixes: c15294c1e36a7dd9b25 ("target/arm: Implement LDG, STG, ST2G instructions") Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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