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| author | qianfan Zhao <qianfanguijin@163.com> | 2023-06-06 10:19:31 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-06-06 10:19:31 +0100 |
| commit | dc2a070d125772fe30384596d4d4ce6d9950b004 (patch) | |
| tree | db13e81b743ba80ebd62ccb0be1b728021431af6 /scripts/simplebench | |
| parent | 8d9006aeca58e4635d58fdd620d52fe77c9eb00d (diff) | |
| download | qemu-dc2a070d125772fe30384596d4d4ce6d9950b004.zip qemu-dc2a070d125772fe30384596d4d4ce6d9950b004.tar.gz qemu-dc2a070d125772fe30384596d4d4ce6d9950b004.tar.bz2 | |
hw/arm/allwinner-r40: add Clock Control Unit
The CCU provides the registers to program the PLLs and the controls
most of the clock generation, division, distribution, synchronization
and gating.
This commit adds support for the Clock Control Unit which emulates
a simple read/write register interface.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'scripts/simplebench')
0 files changed, 0 insertions, 0 deletions