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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-06-06 17:52:41 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-06-07 08:33:45 -0700 |
| commit | ab64da79774060450046ce8c800eef000024dc8c (patch) | |
| tree | fd95944eee2b242ec515d5ecfcf4f87509ea6e57 /scripts/simplebench/bench-backup.py | |
| parent | f5e6786de4815751b0a3d2235c760361f228ea48 (diff) | |
| download | qemu-ab64da79774060450046ce8c800eef000024dc8c.zip qemu-ab64da79774060450046ce8c800eef000024dc8c.tar.gz qemu-ab64da79774060450046ce8c800eef000024dc8c.tar.bz2 | |
tcg/tci: Adjust passing of MemOpIdx
Since adding MO_ATOM_MASK, the maximum MemOpIdx requires 15 bits,
which overflows the 12 bit field allocated for TCI memory ops.
Expand the field to 16 bits for 2-operand memory ops, and place
the value in TCG_REG_TMP for 3-operand memory ops (same as we
already do for 4-operand memory ops).
Cures a debug assert for aarch64, with FEAT_LSE2 enabled.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'scripts/simplebench/bench-backup.py')
0 files changed, 0 insertions, 0 deletions