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author | Alistair Francis <alistair23@gmail.com> | 2024-05-14 12:39:10 +1000 |
---|---|---|
committer | Alistair Francis <alistair.francis@wdc.com> | 2024-06-03 11:12:12 +1000 |
commit | c5eb8d6336741dbcb98efcc347f8265bf60bc9d1 (patch) | |
tree | c0c57784763af70d8e38b413a472234ae020c04c /scripts/shaderinclude.py | |
parent | 73ef14b1277d4c9d79bfe7cb080c09ddba18044f (diff) | |
download | qemu-c5eb8d6336741dbcb98efcc347f8265bf60bc9d1.zip qemu-c5eb8d6336741dbcb98efcc347f8265bf60bc9d1.tar.gz qemu-c5eb8d6336741dbcb98efcc347f8265bf60bc9d1.tar.bz2 |
target/riscv: rvzicbo: Fixup CBO extension register calculation
When running the instruction
```
cbo.flush 0(x0)
```
QEMU would segfault.
The issue was in cpu_gpr[a->rs1] as QEMU does not have cpu_gpr[0]
allocated.
In order to fix this let's use the existing get_address()
helper. This also has the benefit of performing pointer mask
calculations on the address specified in rs1.
The pointer masking specificiation specifically states:
"""
Cache Management Operations: All instructions in Zicbom, Zicbop and Zicboz
"""
So this is the correct behaviour and we previously have been incorrectly
not masking the address.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reported-by: Fabian Thomas <fabian.thomas@cispa.de>
Fixes: e05da09b7cfd ("target/riscv: implement Zicbom extension")
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-stable <qemu-stable@nongnu.org>
Message-ID: <20240514023910.301766-1-alistair.francis@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'scripts/shaderinclude.py')
0 files changed, 0 insertions, 0 deletions