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| author | TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com> | 2024-09-19 13:50:44 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-10-30 11:22:07 +1000 |
| commit | 870589dcddcc542d88c5f0cdd9b2b43becc8a070 (patch) | |
| tree | 331df51c433855266b06d8c29497a82987620df0 /scripts/qemugdb | |
| parent | 929e4277c128772bad41cc795995f754cb9991af (diff) | |
| download | qemu-870589dcddcc542d88c5f0cdd9b2b43becc8a070.zip qemu-870589dcddcc542d88c5f0cdd9b2b43becc8a070.tar.gz qemu-870589dcddcc542d88c5f0cdd9b2b43becc8a070.tar.bz2 | |
target/riscv: Detect sxl to set bit width for RV32 in RV64
Ensure correct bit width based on sxl when running RV32 on RV64 QEMU.
This is required as MMU address translations run in S-mode.
Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20240919055048.562-5-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'scripts/qemugdb')
0 files changed, 0 insertions, 0 deletions