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| author | Jamin Lin <jamin_lin@aspeedtech.com> | 2025-09-19 17:30:03 +0800 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2025-09-29 18:00:20 +0200 |
| commit | cac2f082936de3c35c7b9c04fef4dc99b7af9898 (patch) | |
| tree | f6a2ca31b7116d0748c99598f91a9b4413155d18 /scripts/qapi/parser.py | |
| parent | f002aa35f3205d55bbe4a68670ba19a6dcf1d6a8 (diff) | |
| download | qemu-cac2f082936de3c35c7b9c04fef4dc99b7af9898.zip qemu-cac2f082936de3c35c7b9c04fef4dc99b7af9898.tar.gz qemu-cac2f082936de3c35c7b9c04fef4dc99b7af9898.tar.bz2 | |
hw/pci-host/aspeed: Add AST2600 PCIe Root Device support
Introduce a PCIe Root Device for AST2600 platform.
The AST2600 root complex exposes a PCIe root device at bus 80, devfn 0.
This root device is implemented as a child of the PCIe RC and modeled
as a host bridge PCI function (class_id = PCI_CLASS_BRIDGE_HOST).
Key changes:
- Add a new device type "aspeed.pcie-root-device".
- Instantiate the root device as part of AspeedPCIERcState.
- Initialize it during RC realize() and attach it to the root bus.
- Mark the root device as non-user-creatable.
- Add RC boolean property "has-rd" to control whether the Root Device is
created (platforms can enable/disable it as needed).
Note: Only AST2600 implements this PCIe root device. AST2700 does not
provide one.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250919093017.338309-5-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Diffstat (limited to 'scripts/qapi/parser.py')
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