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authorPeter Maydell <peter.maydell@linaro.org>2020-12-10 20:14:31 +0000
committerPeter Maydell <peter.maydell@linaro.org>2021-01-08 15:13:38 +0000
commit7fbf95a037d79c5e923ffb51ac902dbe9599c87f (patch)
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parent5b7d63706ea460d3999ee9ff3e3e010419d906ca (diff)
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target/arm: Correct store of FPSCR value via FPCXT_S
In commit 64f863baeedc8659 we implemented the v8.1M FPCXT_S register, but we got the write behaviour wrong. On read, this register reads bits [27:0] of FPSCR plus the CONTROL.SFPA bit. On write, it doesn't just write back those bits -- it writes a value to the whole FPSCR, whose upper 4 bits are zeroes. We also incorrectly implemented the write-to-FPSCR as a simple store to vfp.xregs; this skips the "update the softfloat flags" part of the vfp_set_fpscr helper so the value would read back correctly but not actually take effect. Fix both of these things by doing a complete write to the FPSCR using the helper function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201210201433.26262-3-peter.maydell@linaro.org
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