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| author | Richard Henderson <richard.henderson@linaro.org> | 2025-10-07 08:45:52 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-10-07 08:45:52 -0700 |
| commit | 40e62b903ab847eca9ec1f266d4a60c5a3279344 (patch) | |
| tree | b0e879f8f1e4ff5eecfeb03565a8542fbe43e243 /scripts/lib/kdoc/kdoc_parser.py | |
| parent | eb7abb4a719f93ddd56571bf91681044b4159399 (diff) | |
| parent | 932cac41ca633f24f192a69770bf91b55c4d27bb (diff) | |
| download | qemu-40e62b903ab847eca9ec1f266d4a60c5a3279344.zip qemu-40e62b903ab847eca9ec1f266d4a60c5a3279344.tar.gz qemu-40e62b903ab847eca9ec1f266d4a60c5a3279344.tar.bz2 | |
Merge tag 'pull-target-arm-20251007' of https://gitlab.com/pm215/qemu into staging
target-arm queue:
* target/arm: Don't set HCR.RW for AArch32 only CPUs
* new board model: amd-versal2-virt
* xlnx-zynqmp: model the GIC for the Cortex-R5 RPU cluster
* hw/arm: Remove sl_bootparam_write() and 'hw/arm/sharpsl.h' header
* Emulate FEAT_RME_GPC2
# -----BEGIN PGP SIGNATURE-----
#
# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmjlH0AZHHBldGVyLm1h
# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3gvaD/92LoDOIPQYCw72nwr/hiC8
# DAJddqKL1VvirtcrTuwytB1+w/tM2FdNx4ADzryHiNEDay2gXl0g4X4Pq6QFwu8B
# u2gxQhZZc1XWJgvX06CDJZPIUoazQgri21359c+9mJrI94igq1Gisj+KJ2gaMJ/J
# hrtsbovKuuKwMyCwCSK0hqvrUFyechfvJ0MzwVXyHn80lvSeYVbHf8ahdM72Lqdt
# PFJuM6hM/bBbclMRrcgRZJ3gi6HGHdKQ+LyYeQkvpHtaO3FWBgyJE7dtzs3mj4c9
# zw7kFJi56/19G6Fx3CESCIjoUQxLPZ1wDljqcQ9+mIwhQ4Dm7cy/D5z018TotIws
# mNLpMyEYiyC6dl1TxaJkha9jB6MB+nlglpbOGyRDYD1xwV8o5lidAahKxtmZUrGp
# sErUqCL5f+e/inwkFLxKrA2Hk1mjFDzf9/aEF/CyA30JYzRrhCfMoffiqtpPpU5D
# +OD1OAnj+W7HSBzO6N2I+4bfsaILw61YvckaBbO9+Br9yx8QseXHwXGh+RgsMhY4
# yJdde//tRusT32SAVoQKCMTJM5Rkrt4wu1D0F4LFL/4rJaqkAhqirNP4v5JEjrlk
# UDNa19E1TfmLbCG0TfQBWd3kwLYizqjTO0006jpTMX+KIu5aInEIHzzVrKEKK4t5
# fCw9fUM8T4fSTV71wJ/28Q==
# =jFB3
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 07 Oct 2025 07:10:08 AM PDT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [unknown]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [unknown]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [unknown]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20251007' of https://gitlab.com/pm215/qemu: (62 commits)
target/arm: Enable FEAT_RME_GPC2 for -cpu max with x-rme
target/arm: Implement APPSAA
target/arm: Fix GPT fault type for address outside PPS
target/arm: Implement SPAD, NSPAD, RLPAD
target/arm: Implement GPT_NonSecureOnly
target/arm: GPT_Secure is reserved without FEAT_SEL2
target/arm: Add cur_space to S1Translate
target/arm: Enable FEAT_RME_GPC2 bits in gpccr_write
target/arm: Add GPCCR fields from ARM revision L.b
target/arm: Add isar feature test for FEAT_RME_GPC2
hw/arm: Remove sl_bootparam_write() and 'hw/arm/sharpsl.h' header
hw/arm/xlnx-zynqmp: wire a second GIC for the Cortex-R5
hw/arm/xlnx-zynqmp: introduce helper to compute RPU number
hw/arm/xlnx-zynqmp: move GIC_NUM_SPI_INTR define in header
tests/functional/test_aarch64_xlnx_versal: test the versal2 machine
hw/arm/xlnx-versal-virt: add the xlnx-versal2-virt machine
docs/system/arm/xlnx-versal-virt: add a note about dumpdtb
docs/system/arm/xlnx-versal-virt: update supported devices
hw/arm/xlnx-versal-virt: tidy up
hw/arm/xlnx-versal-virt: split into base/concrete classes
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'scripts/lib/kdoc/kdoc_parser.py')
0 files changed, 0 insertions, 0 deletions