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author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-02-12 16:43:31 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2025-02-20 14:20:29 +0000 |
commit | e2e5266c4555ed24a4727c9ce6e34eb5213a9ab6 (patch) | |
tree | 1657908f8df885576cebd2430c2d9a23cb665495 /rust/qemu-api | |
parent | 92fea7f2e7818d3019b5c29eb8379049a3b1f0c4 (diff) | |
download | qemu-e2e5266c4555ed24a4727c9ce6e34eb5213a9ab6.zip qemu-e2e5266c4555ed24a4727c9ce6e34eb5213a9ab6.tar.gz qemu-e2e5266c4555ed24a4727c9ce6e34eb5213a9ab6.tar.bz2 |
hw/arm/vexpress: Specify explicitly the GIC has 64 external IRQs
When not specified, Cortex-A9MP configures its GIC with 64 external
IRQs, (see commit a32134aad89 "arm:make the number of GIC interrupts
configurable"), and Cortex-15MP to 128 (see commit 528622421eb
"hw/cpu/a15mpcore: Correct default value for num-irq").
The Versatile Express board however expects a fixed set of 64
interrupts (see the fixed IRQ length when this board was added in
commit 2055283bcc8 ("hw/vexpress: Add model of ARM Versatile Express
board"). Add the GIC_EXT_IRQS definition (with a comment) to make
that explicit.
Except explicitly setting a property value to its same implicit
value, there is no logical change intended.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250212154333.28644-7-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'rust/qemu-api')
0 files changed, 0 insertions, 0 deletions