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author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2024-12-30 16:11:09 +0100 |
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committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-01-13 17:16:04 +0100 |
commit | 3d66ec208ca75329b61a4e9c4a58462ed5948504 (patch) | |
tree | 48316b313c04a8dceb29e9add7011ca2f2aa50f2 /rust/qemu-api | |
parent | 20f7b890173be6cd38dabad8122b8b2fe51d0255 (diff) | |
download | qemu-3d66ec208ca75329b61a4e9c4a58462ed5948504.zip qemu-3d66ec208ca75329b61a4e9c4a58462ed5948504.tar.gz qemu-3d66ec208ca75329b61a4e9c4a58462ed5948504.tar.bz2 |
target/hppa: Only set PSW 'M' bit on reset
On reset:
"All PSW bits except the M bit is reset. The M bit is set."
Commit 1a19da0da44 ("target/hppa: Fill in hppa_cpu_do_interrupt /
hppa_cpu_exec_interrupt") inadvertently set the W bit at RESET,
remove it and set the M bit.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Helge Deller <deller@gmx.de>
Message-Id: <20241231190620.24442-5-philmd@linaro.org>
Diffstat (limited to 'rust/qemu-api')
0 files changed, 0 insertions, 0 deletions