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authorStefan Hajnoczi <stefanha@redhat.com>2025-03-03 10:20:03 +0800
committerStefan Hajnoczi <stefanha@redhat.com>2025-03-03 10:20:03 +0800
commit09951f5a27a7f8633118c1808cf17e66b30c3c62 (patch)
tree45a0267fcd27788004da9d4feb33eeae2b830213 /rust/qemu-api/src
parent50d38b8921837827ea397d4b20c8bc5efe186e53 (diff)
parent1aaf3478684ff1cd02d1b36c32a00bfac9a5dbd5 (diff)
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Merge tag 'pull-target-arm-20250225' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm/smmuv3: Fill u.f_cd_fetch.addr for SMMU_EVT_F_CD_FETCH * hw/arm/virt: Support larger highmem MMIO regions * machine: Centralize -machine dumpdtb option handling and report attempt to dump nonexistent DTB as an error * fpu: remove target ifdefs and build it only once * target/arm: Refactor to move TCG-only vfp_helper code into tcg/ * target/arm/hvf: Disable SME feature * target/arm/hvf: sign extend the data for a load operation when SSE=1 * hw/misc/npcm_clk: fix buffer-overflow * hw/arm: Add i.MX 8M Plus EVK board ("imx8mp-evk") # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAme+BaQZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3kG0EACuWqAhqYdn2muu1Rc3WQMh # uMOdb/f7oaqbCpeBEdV1dazWfZJQ1Zk05J31t+tdoYowqM7nS55Vw9zrSntoC6Ll # IYRzBmGWE+FnsODKhA0wx/lQO08GeMTrkHoGM72hiwIjbuC/Nps9aOQ2GH6WOCjN # TACXF1dYNpoy+H979yIwGMWH1SSgn1fS+9zw3LsKCGtbnt7g80DyWpb6qlfKPJ78 # KHmpth//sCPbu6UtsFKTBlIb0dYtAWTnRoS834WBq9bw51OPh81WoApSBkjV479z # kTcLyaJnoTKsPnz+6A/z3Fm/qi4aATk4/eCCT2ry3Oyi3ffafSlBf/KiFqAZ0Fue # vq6/b/wsVTdyjnkcptmCHJ+6qEhPshNi3F4hu8YOFQsx+6zFR7NUkZrNt/IQIhZB # DOcjtMFymg/duEbRW9RdLeVC3Ds2qVuxnzEbLmNJntBp+jkhm5QkWf6ZEJ6iviOf # tSP+SLOFyCT71BdQSIMhLJHS9UPJ3vzgGkN54YCLDYg24aNCMSe0nqLFMxfchQJm # njn1BdyX4pDibXv6tdDJdtOv3sLgvVaZZKEGlTGtNx8kq8qmXnzIJl6iQSBTrmD5 # qMb4NxaYG6hpzSQOV+XxLQ1BdLNj2qXs90EU1Jqfp378sOdl6Oyx5po5NIcyp36o # g+GsbLqphJL4DkosoH8eFA== # =MBWK # -----END PGP SIGNATURE----- # gpg: Signature made Wed 26 Feb 2025 02:02:12 HKT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250225' of https://git.linaro.org/people/pmaydell/qemu-arm: (43 commits) hw/arm/fsl-imx8mp: Add on-chip RAM hw/arm/fsl-imx8mp: Add USB support hw/arm/fsl-imx8mp: Add Ethernet controller hw/arm/fsl-imx8mp: Implement general purpose timers hw/arm/fsl-imx8mp: Add watchdog support hw/arm/fsl-imx8mp: Add SPI controllers hw/arm/fsl-imx8mp: Add I2C controllers hw/arm/fsl-imx8mp: Add GPIO controllers hw/arm/fsl-imx8mp: Add PCIe support hw/arm/fsl-imx8mp: Add USDHC storage controllers hw/arm/fsl-imx8mp: Add SNVS hw/arm/fsl-imx8mp: Implement clock tree hw/arm: Add i.MX 8M Plus EVK board hw/gpio/pca955*: Move Kconfig switches next to implementations hw/pci-host/designware: Prevent device attachment on internal PCIe root bus hw/usb/hcd-dwc3: Align global registers size with Linux hw/misc/npcm_clk: fix buffer-overflow target/arm/hvf: sign extend the data for a load operation when SSE=1 target/arm/hvf: Disable SME feature target/arm: Rename vfp_helper.c to vfp_fpscr.c ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'rust/qemu-api/src')
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