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authorStefan Hajnoczi <stefanha@redhat.com>2025-03-10 13:40:35 +0800
committerStefan Hajnoczi <stefanha@redhat.com>2025-03-10 13:40:35 +0800
commit2e14ac3c9ca25c974bb300c45c5b0303862c177d (patch)
tree19e7f8f5107d9301063d20927ba613fe54acb30c /rust/qemu-api/src/timer.rs
parent1843a0c01d06049f517fea7e155e5236e7287276 (diff)
parent5ab179db11ca297c9e89a6d57f954d31965cbd7b (diff)
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Merge tag 'pull-aspeed-20250309' of https://github.com/legoater/qemu into staging
aspeed queue: * Updated Aspeed OpenBMC functional test images * Introduced functional tests for witherspoon and bletchley machines * Added support for Non-maskable Interrupt on AST2700 SoC * Fixed HW strapping on AST2700 SoC * Added AST2700 HACE support * Added AST2700 A1 SoC support * Intoduced new ast2700a1-evb machine # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmfNnIUACgkQUaNDx8/7 # 7KFMGQ//YHvJV30PkI9CHO6Gbk3CmWftI9Dbjn7goghV/hArVThiq9fve3n2GxYJ # aKrpQZ3BK5SOvcp1zzSc2HrCxmzhy98TZfH2vqwqx3T7uqLDTGgo6xGRYT7+fuVn # SzQaxFJ5hG8LdR4GqDcuUlUVyjVM3ZGR8E/Guj6s6Um1gctZsjy7Z+CdAWDlXFWM # uJoI9EwbhdIWYWF6jJw3myOjMhXHNZs0IobvS7yzZ3DGX0o/P3jRxFYeS6P9lQDl # +TmZ/IRuZDMgA3N+jAyQfMjmlvtA0BygLUbrKTJXb6Bz0BhUjUVahOv6Mnq86yZh # glKCg9LB4BVZneTw5VSd3Tj6Lt/qNhhJjRlV+UYxWzZ0zmFNdkq08RRxKCmMbtYi # t4DsT7xGqfMK9JXEOIWa5REyP4i5llzKe173ml4wSi1Nro9hzZz5cgAKS+7Eabni # nCLhOi26hwkBUCqCKN2eTyRKqOtyftOiKGYog1EV4YtwbnfQS072h0FJz8H6Ibkt # n+twrO8NY31Y0JMzj0GksZ0JSlV/04mtuIpNMSqPizMN/VZPznqwCiaGADtips4f # DoJRtJyDaI/n0IlbtcRpcsrax0uQQEdClvFlcfOkSvkm1aZU2q7wwSKbyOkcnWgd # qnxkUqjHnQTlUSEOqjhtEcw7Bv6J7Mn5IwN0zKROIZp9ia+LZwI= # =O5Kv # -----END PGP SIGNATURE----- # gpg: Signature made Sun 09 Mar 2025 21:49:57 HKT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@redhat.com>" [full] # gpg: aka "Cédric Le Goater <clg@kaod.org>" [full] # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20250309' of https://github.com/legoater/qemu: (46 commits) docs/specs: Add aspeed-intc tests/functional/aspeed: Add test case for AST2700 A1 tests/functional/aspeed: Update test ASPEED SDK v09.05 tests/functional/aspeed: Update temperature hwmon path tests/functional/aspeed: Introduce start_ast2700_test API hw/arm/aspeed_ast27x0: Sort the memmap table by mapping address hw/arm/aspeed: Add Machine Support for AST2700 A1 hw/arm/aspeed_ast27x0: Add SoC Support for AST2700 A1 hw/arm/aspeed_ast27x0: Support two levels of INTC controllers for AST2700 A1 hw/arm/aspeed_ast27x0: Define an Array of AspeedINTCState with Two Instances hw/arm/aspeed_ast27x0.c Support AST2700 A1 GIC Interrupt Mapping hw/misc/aspeed_scu: Add Support for AST2700/AST2750 A1 Silicon Revisions hw/intc/aspeed: Add Support for AST2700 INTCIO Controller hw/intc/aspeed: Add Support for Multi-Output IRQ Handling hw/intc/aspeed: Introduce IRQ handler function to reduce code duplication hw/intc/aspeed: Introduce AspeedINTCIRQ structure to save the irq index and register address hw/intc/aspeed: Refactor INTC to support separate input and output pin indices hw/intc/aspeed: Add support for multiple output pins in INTC hw/intc/aspeed: Rename num_ints to num_inpins for clarity hw/intc/aspeed: Support different memory region ops ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'rust/qemu-api/src/timer.rs')
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