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| author | Peter Maydell <peter.maydell@linaro.org> | 2025-01-30 18:23:09 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-02-20 14:20:29 +0000 |
| commit | 2b95a2d01b04afadf510a49ac14b38a59be8c5f5 (patch) | |
| tree | 903fda8cdf95c3355381f35195f1787c1642a227 /rust/qemu-api/src/memory.rs | |
| parent | 86d44c215e91da43555a2cfd58b7c6b725f036fb (diff) | |
| download | qemu-2b95a2d01b04afadf510a49ac14b38a59be8c5f5.zip qemu-2b95a2d01b04afadf510a49ac14b38a59be8c5f5.tar.gz qemu-2b95a2d01b04afadf510a49ac14b38a59be8c5f5.tar.bz2 | |
target/arm: Correct errors in WFI/WFE trapping
The code for WFI/WFE trapping has several errors:
* it wasn't using arm_sctlr(), so it would look at SCTLR_EL1
even if the CPU was in the EL2&0 translation regime
* it was raising UNDEF, not Monitor Trap, for traps to
AArch32 EL3 because of SCR.{TWE,TWI}
* it was not honouring SCR.{TWE,TWI} when running in
AArch32 at EL3 not in Monitor mode
* it checked SCR.{TWE,TWI} even on v7 CPUs which don't have
those bits
Fix these bugs.
Cc: qemu-stable@nongnu.org
Fixes: b1eced713d99 ("target-arm: Add WFx instruction trap support")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250130182309.717346-15-peter.maydell@linaro.org
Diffstat (limited to 'rust/qemu-api/src/memory.rs')
0 files changed, 0 insertions, 0 deletions