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| author | Bernhard Beschow <shentey@gmail.com> | 2025-05-01 20:34:45 +0200 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-05-06 15:02:35 +0100 |
| commit | eba837a31b9579e30cc6d7ecb4b5c2662a6ffaba (patch) | |
| tree | 7c0dd67eb55a92366932f3ef859438e9a7855de4 /rust/qemu-api/src/callbacks.rs | |
| parent | 4fb17d01ef35411280475c0a80e1312baad5dc12 (diff) | |
| download | qemu-eba837a31b9579e30cc6d7ecb4b5c2662a6ffaba.zip qemu-eba837a31b9579e30cc6d7ecb4b5c2662a6ffaba.tar.gz qemu-eba837a31b9579e30cc6d7ecb4b5c2662a6ffaba.tar.bz2 | |
hw/gpio/imx_gpio: Fix interpretation of GDIR polarity
According to the i.MX 8M Plus reference manual, a GPIO pin is
configured as an output when the corresponding bit in the GDIR
register is set. The function imx_gpio_set_int_line() is intended to
be a no-op if the pin is configured as an output, returning early in
such cases. However, it inverts the condition. Fix this by
returning early when the bit is set.
cc: qemu-stable@nongnu.org
Fixes: f44272809779 ("i.MX: Add GPIO device")
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-id: 20250501183445.2389-4-shentey@gmail.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'rust/qemu-api/src/callbacks.rs')
0 files changed, 0 insertions, 0 deletions