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| author | Anup Patel <apatel@ventanamicro.com> | 2022-06-11 13:31:04 +0530 |
|---|---|---|
| committer | Alistair Francis <alistair@alistair23.me> | 2022-07-03 10:03:20 +1000 |
| commit | 188000952ca002402e41efe0a0d333097024dd90 (patch) | |
| tree | 70fa910923b57c2eb62c94155a68691404114801 /qobject/json-parser-int.h | |
| parent | be2265c776a67287cea03908495cf1e785271c6f (diff) | |
| download | qemu-188000952ca002402e41efe0a0d333097024dd90.zip qemu-188000952ca002402e41efe0a0d333097024dd90.tar.gz qemu-188000952ca002402e41efe0a0d333097024dd90.tar.bz2 | |
target/riscv: Don't force update priv spec version to latest
The riscv_cpu_realize() sets priv spec version to v1.12 when it is
when "env->priv_ver == 0" (i.e. default v1.10) because the enum
value of priv spec v1.10 is zero.
Due to above issue, the sifive_u machine will see priv spec v1.12
instead of priv spec v1.10.
To fix this issue, we set latest priv spec version (i.e. v1.12)
for base rv64/rv32 cpu and riscv_cpu_realize() will override priv
spec version only when "cpu->cfg.priv_spec != NULL".
Fixes: 7100fe6c2441 ("target/riscv: Enable privileged spec version 1.12")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-Id: <20220611080107.391981-2-apatel@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'qobject/json-parser-int.h')
0 files changed, 0 insertions, 0 deletions