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authorPeter Maydell <peter.maydell@linaro.org>2015-08-13 11:26:22 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-08-13 11:26:22 +0100
commitb4d3978c2fdf944e428a46d2850dbd950b6fbe78 (patch)
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parent49a661910c1374858602a3002b67115893673c25 (diff)
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target-arm: Add the AArch64 view of the Secure physical timer
On CPUs with EL3, there are two physical timers, one for Secure and one for Non-secure. Implement this extra timer and the AArch64 registers which access it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1437047249-2357-2-git-send-email-peter.maydell@linaro.org
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