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| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2023-10-23 15:02:07 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2023-11-07 03:39:11 -0500 |
| commit | 388d6b574e282b02e8180f4cba428316a404deea (patch) | |
| tree | ff8030264eb6bda217ead5b06135a2f15caf909e /qemu-nbd.c | |
| parent | 629df5cc23cc9aec5d115cc9be3456458e2b44fa (diff) | |
| download | qemu-388d6b574e282b02e8180f4cba428316a404deea.zip qemu-388d6b574e282b02e8180f4cba428316a404deea.tar.gz qemu-388d6b574e282b02e8180f4cba428316a404deea.tar.bz2 | |
hw/cxl: Use switch statements for read and write of cachemem registers
Establishing that only register accesses of size 4 and 8 can occur
using these functions requires looking at their callers. Make it
easier to see that by using switch statements.
Assertions are used to enforce that the register storage is of the
matching size, allowing fixed values to be used for divisors of
the array indices.
Suggested-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Message-Id: <20231023140210.3089-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'qemu-nbd.c')
0 files changed, 0 insertions, 0 deletions