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author | Richard Henderson <richard.henderson@linaro.org> | 2018-01-24 14:24:53 -0800 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2018-01-31 05:30:50 -0800 |
commit | fe0a69cca56e115f7dc2800a91ef0c8be69828b6 (patch) | |
tree | f71ec57079dd37efbad79317681d868c95b874c9 /qemu-io.c | |
parent | 61461802bb535f7a004d85c181bf2061121924bf (diff) | |
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target/hppa: Fix 32-bit operand masks for 0E FCVT
We masked the wrong bits, which prevented some of the
32-bit R registers. E.g. "fcnvxf,sgl,sgl fr22R,fr6R".
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'qemu-io.c')
0 files changed, 0 insertions, 0 deletions