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author | Finn Thain <fthain@telegraphics.com.au> | 2020-01-29 20:27:49 +1100 |
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committer | Jason Wang <jasowang@redhat.com> | 2020-03-03 18:04:47 +0800 |
commit | 5b0c98fcb7ac006bd8efe0e0fecba52c43a9d028 (patch) | |
tree | b31218dece009cd7282b9987e2f01c72895c663d /qemu-io-cmds.c | |
parent | 9e3cd456d85ad45e72bdba99203302342ce29b3b (diff) | |
download | qemu-5b0c98fcb7ac006bd8efe0e0fecba52c43a9d028.zip qemu-5b0c98fcb7ac006bd8efe0e0fecba52c43a9d028.tar.gz qemu-5b0c98fcb7ac006bd8efe0e0fecba52c43a9d028.tar.bz2 |
dp8393x: Update LLFA and CRDA registers from rx descriptor
Follow the algorithm given in the National Semiconductor DP83932C
datasheet in section 3.4.7:
At the next reception, the SONIC re-reads the last RXpkt.link field,
and updates its CRDA register to point to the next descriptor.
The chip is designed to allow the host to provide a new list of
descriptors in this way.
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Tested-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Diffstat (limited to 'qemu-io-cmds.c')
0 files changed, 0 insertions, 0 deletions