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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2024-11-06 10:34:02 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-12-20 11:19:16 +1000 |
| commit | d13346d105c396e0d95851b58f52cac43ad55952 (patch) | |
| tree | d7026ac10f23c839671f0b8722ba9cd707ba0d0a /qemu-img.c | |
| parent | 4876e6f7b51cf7dcbfaa43ae323e51ce9ebfcf79 (diff) | |
| download | qemu-d13346d105c396e0d95851b58f52cac43ad55952.zip qemu-d13346d105c396e0d95851b58f52cac43ad55952.tar.gz qemu-d13346d105c396e0d95851b58f52cac43ad55952.tar.bz2 | |
hw/riscv/riscv-iommu: parametrize CAP.IGS
Interrupt Generation Support (IGS) is a capability that is tied to the
interrupt deliver mechanism, not with the core IOMMU emulation. We
should allow device implementations to set IGS as they wish.
A new helper is added to make it easier for device impls to set IGS. Use
it in our existing IOMMU device (riscv-iommu-pci) to set
RISCV_IOMMU_CAPS_IGS_MSI.
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241106133407.604587-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'qemu-img.c')
0 files changed, 0 insertions, 0 deletions