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authorAaron Larson <alarson@ddci.com>2017-06-02 04:32:59 -0700
committerDavid Gibson <david@gibson.dropbear.id.au>2017-06-06 08:53:24 +1000
commita09f7443bcccd1703adf7c2954af695629c784a5 (patch)
tree93603cb5cccb98bbc559b4c8561c8d3180873fba /qemu-bridge-helper.c
parent0b55aa91c976b30b527c123fb66d25f5db43d083 (diff)
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target-ppc: Fix openpic timer read register offset
openpic_tmr_read() is incorrectly computing register offset of the TCCR, TBCR, TVPR, and TDR registers when accessing the open pic timer registers. Specifically the offset of timer registers for openpic_tmr_read() is not accounting for the timer frequency reporting register (TFFR) which is the first register in the "tmr" memory region. openpic_tmr_write() *is* correctly computing the offset by adding 0x10f0 to the address prior to computing the register index. This patch instead subtracts 0x10 in both the read and write routines and eliminates some other gratuitous differences between the functions. Signed-off-by: Aaron Larson <alarson@ddci.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'qemu-bridge-helper.c')
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