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| author | Daniel Henrique Barboza <dbarboza@ventanamicro.com> | 2023-10-18 16:56:34 -0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2023-11-07 11:06:01 +1000 |
| commit | aeb2bc5950bda70f97c6a7fcbdf1ab2b167d4fa4 (patch) | |
| tree | 9141d5db29b19b3639809c41b5e84aaea4f218bd /qapi | |
| parent | 456a65546f6761aab09275ed7055d113608e3bb2 (diff) | |
| download | qemu-aeb2bc5950bda70f97c6a7fcbdf1ab2b167d4fa4.zip qemu-aeb2bc5950bda70f97c6a7fcbdf1ab2b167d4fa4.tar.gz qemu-aeb2bc5950bda70f97c6a7fcbdf1ab2b167d4fa4.tar.bz2 | |
qapi,risc-v: add query-cpu-model-expansion
This API is used to inspect the characteristics of a given CPU model. It
also allows users to validate a CPU model with a certain configuration,
e.g. if "-cpu X,a=true,b=false" is a valid setup for a given QEMU
binary. We'll start implementing the first part. The second requires
more changes in RISC-V CPU boot flow.
The implementation is inspired by the existing ARM
query-cpu-model-expansion impl in target/arm/arm-qmp-cmds.c. We'll
create a RISCVCPU object with the required model, fetch its existing
properties, add a couple of relevant boolean options (pmp and mmu) and
display it to users.
Here's an usage example:
./build/qemu-system-riscv64 -S -M virt -display none \
-qmp tcp:localhost:1234,server,wait=off
./scripts/qmp/qmp-shell localhost:1234
Welcome to the QMP low-level shell!
Connected to QEMU 8.1.50
(QEMU) query-cpu-model-expansion type=full model={"name":"rv64"}
{"return": {"model": {"name": "rv64", "props": {"zicond": false, "x-zvfh": false, "mmu": true, "x-zvfbfwma": false, "x-zvfbfmin": false, "xtheadbs": false, "xtheadbb": false, "xtheadba": false, "xtheadmemidx": false, "smstateen": false, "zfinx": false, "Zve64f": false, "Zve32f": false, "x-zvfhmin": false, "xventanacondops": false, "xtheadcondmov": false, "svpbmt": false, "zbs": true, "zbc": true, "zbb": true, "zba": true, "zicboz": true, "xtheadmac": false, "Zfh": false, "Zfa": true, "zbkx": false, "zbkc": false, "zbkb": false, "Zve64d": false, "x-zfbfmin": false, "zk": false, "x-epmp": false, "xtheadmempair": false, "zkt": false, "zks": false, "zkr": false, "zkn": false, "Zfhmin": false, "zksh": false, "zknh": false, "zkne": false, "zknd": false, "zhinx": false, "Zicsr": true, "sscofpmf": false, "Zihintntl": true, "sstc": true, "xtheadcmo": false, "x-zvbb": false, "zksed": false, "x-zvkned": false, "xtheadsync": false, "x-zvkg": false, "zhinxmin": false, "svadu": true, "xtheadfmv": false, "x-zvksed": false, "svnapot": false, "pmp": true, "x-zvknhb": false, "x-zvknha": false, "xtheadfmemidx": false, "x-zvksh": false, "zdinx": false, "zicbom": true, "Zihintpause": true, "svinval": false, "zcf": false, "zce": false, "zcd": false, "zcb": false, "zca": false, "x-ssaia": false, "x-smaia": false, "zmmul": false, "x-zvbc": false, "Zifencei": true, "zcmt": false, "zcmp": false, "Zawrs": true}}}}
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20231018195638.211151-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'qapi')
| -rw-r--r-- | qapi/machine-target.json | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/qapi/machine-target.json b/qapi/machine-target.json index c8d7d98..7b7149f 100644 --- a/qapi/machine-target.json +++ b/qapi/machine-target.json @@ -231,7 +231,8 @@ 'if': { 'any': [ 'TARGET_S390X', 'TARGET_I386', 'TARGET_ARM', - 'TARGET_LOONGARCH64' ] } } + 'TARGET_LOONGARCH64', + 'TARGET_RISCV' ] } } ## # @query-cpu-model-expansion: @@ -277,7 +278,8 @@ 'if': { 'any': [ 'TARGET_S390X', 'TARGET_I386', 'TARGET_ARM', - 'TARGET_LOONGARCH64' ] } } + 'TARGET_LOONGARCH64', + 'TARGET_RISCV' ] } } ## # @CpuDefinitionInfo: |