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| author | Paolo Bonzini <pbonzini@redhat.com> | 2024-05-09 10:15:05 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2024-06-17 09:47:39 +0200 |
| commit | e4e5981daf37146473b30b9219f78796d15320c5 (patch) | |
| tree | 704c42ecda6e3d468b0c3c04fdb1ea3795297af8 /python | |
| parent | 87b2037b65d07d43edff1c4e177e9136dff32896 (diff) | |
| download | qemu-e4e5981daf37146473b30b9219f78796d15320c5.zip qemu-e4e5981daf37146473b30b9219f78796d15320c5.tar.gz qemu-e4e5981daf37146473b30b9219f78796d15320c5.tar.bz2 | |
target/i386: adapt gen_shift_count for SHLD/SHRD
SHLD/SHRD can have 3 register operands - s->T0, s->T1 and either
1 or CL - and therefore decode->op[2] is taken by the low part
of the register being shifted. Pass X86_OP_* to gen_shift_count
from its current callers and hardcode cpu_regs[R_ECX] as the
shift count.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'python')
0 files changed, 0 insertions, 0 deletions