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authorJamin Lin <jamin_lin@aspeedtech.com>2024-09-03 16:35:18 +0800
committerCédric Le Goater <clg@redhat.com>2024-09-16 17:44:07 +0200
commit94500e83eaf4a577ee4ce5ce16be0587ed04a225 (patch)
treee5a0a3a96876bb00dbe152ccba7208fd57e03b0a /python
parent737cb2f3b21af83ab3e01d4f86e52c1c1afe3524 (diff)
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hw/i2c/aspeed: Support discontinuous register memory region of I2C bus
It only support continuous register memory region for all I2C bus. However, the register address of all I2c bus are discontinuous for AST2700. Ex: the register address of I2C bus for ast2700 as following. 0x100 - 0x17F: Device 0 0x200 - 0x27F: Device 1 0x300 - 0x37F: Device 2 0x400 - 0x47F: Device 3 0x500 - 0x57F: Device 4 0x600 - 0x67F: Device 5 0x700 - 0x77F: Device 6 0x800 - 0x87F: Device 7 0x900 - 0x97F: Device 8 0xA00 - 0xA7F: Device 9 0xB00 - 0xB7F: Device 10 0xC00 - 0xC7F: Device 11 0xD00 - 0xD7F: Device 12 0xE00 - 0xE7F: Device 13 0xF00 – 0xF7F: Device 14 0x1000 – 0x107F: Device 15 Introduce a new class attribute to make user set each I2C bus gap size. Update formula to create all I2C bus register memory regions. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com>
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