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| author | Paolo Bonzini <pbonzini@redhat.com> | 2025-02-06 17:03:01 +0100 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-05-20 08:18:53 +0200 |
| commit | 4e012d36c8654e7fa12762002150334bf591628a (patch) | |
| tree | 32da0de09daab115fd01b0690472a44d510007d4 /python | |
| parent | a6ba81424a7e751fbcee40dc1f5826ba29fddd30 (diff) | |
| download | qemu-4e012d36c8654e7fa12762002150334bf591628a.zip qemu-4e012d36c8654e7fa12762002150334bf591628a.tar.gz qemu-4e012d36c8654e7fa12762002150334bf591628a.tar.bz2 | |
target/riscv: convert abstract CPU classes to RISCVCPUDef
Start from the top of the hierarchy: dynamic and vendor CPUs are just
markers, whereas bare CPUs can have their instance_init function
replaced by RISCVCPUDef.
The only difference is that the maximum supported SATP mode has to
be specified separately for 32-bit and 64-bit modes.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'python')
0 files changed, 0 insertions, 0 deletions