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authorStefan Hajnoczi <stefanha@redhat.com>2025-05-28 15:17:25 -0400
committerStefan Hajnoczi <stefanha@redhat.com>2025-05-28 15:17:25 -0400
commit3072961b6edc99abfbd87caac3de29bb58a52ccf (patch)
treebf8e8ec9883ce97137c7a38b450aa11afeddc671 /python
parentf88934b61ee0dc1d583f0a576ce87ed2ff9c116b (diff)
parent5c2891601ccdaa41427187ef95bc25c828b355e4 (diff)
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Merge tag 'pull-tcg-20250528' of https://gitlab.com/rth7680/qemu into staging
accel/tcg: Fix atomic_mmu_lookup vs TLB_FORCE_SLOW linux-user: implement pgid field of /proc/self/stat target/sh4: Use MO_ALIGN for system UNALIGN() target/microblaze: Use TARGET_LONG_BITS == 32 for system mode accel/tcg: Add TCGCPUOps.pointer_wrap target/*: Populate TCGCPUOps.pointer_wrap # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmg2xZAdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/VmAgAu5PHIARUuNqneUPQ # 2JxqpZHGVbaXE0ACi9cslpfThFM/I4OXmK21ZWb1dHB3qasNiKU8cdImXSUVH3dj # DLsr/tliReerZGUoHEtFsYd+VOtqb3wcrvXxnzG/xB761uZjFCnqwy4MrXMfSXVh # 6w+eysWOblYHQb9rAZho4nyw6BgjYAX2vfMFxLJBcDP/fjILFB7xoXHEyqKWMmE1 # 0enA0KUotyLOCRXVEXSsfPDYD8szXfMkII3YcGnscthm5j58oc3skVdKFGVjNkNb # /aFpyvoU7Vp3JpxkYEIWLQrRM75VSb1KzJwMipHgYy3GoV++BrY10T0jyEPrx0iq # RFzK4A== # =XQzq # -----END PGP SIGNATURE----- # gpg: Signature made Wed 28 May 2025 04:13:04 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20250528' of https://gitlab.com/rth7680/qemu: (28 commits) accel/tcg: Assert TCGCPUOps.pointer_wrap is set target/sparc: Fill in TCGCPUOps.pointer_wrap target/s390x: Fill in TCGCPUOps.pointer_wrap target/riscv: Fill in TCGCPUOps.pointer_wrap target/ppc: Fill in TCGCPUOps.pointer_wrap target/mips: Fill in TCGCPUOps.pointer_wrap target/loongarch: Fill in TCGCPUOps.pointer_wrap target/i386: Fill in TCGCPUOps.pointer_wrap target/arm: Fill in TCGCPUOps.pointer_wrap target: Use cpu_pointer_wrap_uint32 for 32-bit targets target: Use cpu_pointer_wrap_notreached for strict align targets accel/tcg: Add TCGCPUOps.pointer_wrap target/sh4: Use MO_ALIGN for system UNALIGN() tcg: Drop TCGContext.page_{mask,bits} tcg: Drop TCGContext.tlb_dyn_max_bits target/microblaze: Simplify compute_ldst_addr_type{a,b} target/microblaze: Drop DisasContext.r0 target/microblaze: Use TARGET_LONG_BITS == 32 for system mode target/microblaze: Fix printf format in mmu_translate target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'python')
0 files changed, 0 insertions, 0 deletions