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author | Peter Maydell <peter.maydell@linaro.org> | 2021-06-28 14:58:19 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2021-07-02 11:48:36 +0100 |
commit | 303db86fc73c68d8774203d4796b9995cc122886 (patch) | |
tree | 8099b68b25de78ffe3de72533851a559caccb2f4 /python | |
parent | d59ccc30f64249d5727bc084e0f3cf4b2483117b (diff) | |
download | qemu-303db86fc73c68d8774203d4796b9995cc122886.zip qemu-303db86fc73c68d8774203d4796b9995cc122886.tar.gz qemu-303db86fc73c68d8774203d4796b9995cc122886.tar.bz2 |
target/arm: Fix bugs in MVE VRMLALDAVH, VRMLSLDAVH
The initial implementation of the MVE VRMLALDAVH and VRMLSLDAVH
insns had some bugs:
* the 32x32 multiply of elements was being done as 32x32->32,
not 32x32->64
* we were incorrectly maintaining the accumulator in its full
72-bit form across all 4 beats of the insn; in the pseudocode
it is squashed back into the 64 bits of the RdaHi:RdaLo
registers after each beat
In particular, fixing the second of these allows us to recast
the implementation to avoid 128-bit arithmetic entirely.
Since the element size here is always 4, we can also drop the
parameterization of ESIZE to make the code a little more readable.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210628135835.6690-3-peter.maydell@linaro.org
Diffstat (limited to 'python')
0 files changed, 0 insertions, 0 deletions