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author | Babu Moger <babu.moger@amd.com> | 2025-05-08 14:58:04 -0500 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2025-05-28 19:35:55 +0200 |
commit | 3771a4daa273ba17cb27309984413790d1df5651 (patch) | |
tree | 0412cab443aa330b910da22358bd24b40dc94fac /python/scripts | |
parent | abc92cc8488b5dbcc403b5be24d8092180605101 (diff) | |
download | qemu-3771a4daa273ba17cb27309984413790d1df5651.zip qemu-3771a4daa273ba17cb27309984413790d1df5651.tar.gz qemu-3771a4daa273ba17cb27309984413790d1df5651.tar.bz2 |
target/i386: Add support for EPYC-Turin model
Add the support for AMD EPYC zen 5 processors (EPYC-Turin).
Add the following new feature bits on top of the feature bits from
the previous generation EPYC models.
movdiri : Move Doubleword as Direct Store Instruction
movdir64b : Move 64 Bytes as Direct Store Instruction
avx512-vp2intersect : AVX512 Vector Pair Intersection to a Pair
of Mask Register
avx-vnni : AVX VNNI Instruction
prefetchi : Indicates support for IC prefetch
sbpb : Selective Branch Predictor Barrier
ibpb-brtype : IBPB includes branch type prediction flushing
srso-user-kernel-no : Not vulnerable to SRSO at the user-kernel boundary
Link: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/57238.zip
Link: https://www.amd.com/content/dam/amd/en/documents/corporate/cr/speculative-return-stack-overflow-whitepaper.pdf
Signed-off-by: Babu Moger <babu.moger@amd.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Link: https://lore.kernel.org/r/b4fa7708a0e1453d2e9b8ec3dc881feb92eeca0b.1746734284.git.babu.moger@amd.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'python/scripts')
0 files changed, 0 insertions, 0 deletions