aboutsummaryrefslogtreecommitdiff
path: root/opc-i386.h
diff options
context:
space:
mode:
authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-03-19 00:00:28 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-03-19 00:00:28 +0000
commitdc99065b5f97cc0410f88e3f90c7440531a55f9f (patch)
treea0566030175ea990f8aeeec662b3fa2e6b704bcf /opc-i386.h
parentca735206e0f223d75894260fb98c0c605f590817 (diff)
downloadqemu-dc99065b5f97cc0410f88e3f90c7440531a55f9f.zip
qemu-dc99065b5f97cc0410f88e3f90c7440531a55f9f.tar.gz
qemu-dc99065b5f97cc0410f88e3f90c7440531a55f9f.tar.bz2
added flags computation optimization
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@34 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'opc-i386.h')
-rw-r--r--opc-i386.h518
1 files changed, 518 insertions, 0 deletions
diff --git a/opc-i386.h b/opc-i386.h
new file mode 100644
index 0000000..aae2894
--- /dev/null
+++ b/opc-i386.h
@@ -0,0 +1,518 @@
+DEF(end)
+DEF(movl_A0_EAX)
+DEF(addl_A0_EAX)
+DEF(addl_A0_EAX_s1)
+DEF(addl_A0_EAX_s2)
+DEF(addl_A0_EAX_s3)
+DEF(movl_T0_EAX)
+DEF(movl_T1_EAX)
+DEF(movh_T0_EAX)
+DEF(movh_T1_EAX)
+DEF(movl_EAX_T0)
+DEF(movl_EAX_T1)
+DEF(movl_EAX_A0)
+DEF(cmovw_EAX_T1_T0)
+DEF(cmovl_EAX_T1_T0)
+DEF(movw_EAX_T0)
+DEF(movw_EAX_T1)
+DEF(movw_EAX_A0)
+DEF(movb_EAX_T0)
+DEF(movh_EAX_T0)
+DEF(movb_EAX_T1)
+DEF(movh_EAX_T1)
+DEF(movl_A0_ECX)
+DEF(addl_A0_ECX)
+DEF(addl_A0_ECX_s1)
+DEF(addl_A0_ECX_s2)
+DEF(addl_A0_ECX_s3)
+DEF(movl_T0_ECX)
+DEF(movl_T1_ECX)
+DEF(movh_T0_ECX)
+DEF(movh_T1_ECX)
+DEF(movl_ECX_T0)
+DEF(movl_ECX_T1)
+DEF(movl_ECX_A0)
+DEF(cmovw_ECX_T1_T0)
+DEF(cmovl_ECX_T1_T0)
+DEF(movw_ECX_T0)
+DEF(movw_ECX_T1)
+DEF(movw_ECX_A0)
+DEF(movb_ECX_T0)
+DEF(movh_ECX_T0)
+DEF(movb_ECX_T1)
+DEF(movh_ECX_T1)
+DEF(movl_A0_EDX)
+DEF(addl_A0_EDX)
+DEF(addl_A0_EDX_s1)
+DEF(addl_A0_EDX_s2)
+DEF(addl_A0_EDX_s3)
+DEF(movl_T0_EDX)
+DEF(movl_T1_EDX)
+DEF(movh_T0_EDX)
+DEF(movh_T1_EDX)
+DEF(movl_EDX_T0)
+DEF(movl_EDX_T1)
+DEF(movl_EDX_A0)
+DEF(cmovw_EDX_T1_T0)
+DEF(cmovl_EDX_T1_T0)
+DEF(movw_EDX_T0)
+DEF(movw_EDX_T1)
+DEF(movw_EDX_A0)
+DEF(movb_EDX_T0)
+DEF(movh_EDX_T0)
+DEF(movb_EDX_T1)
+DEF(movh_EDX_T1)
+DEF(movl_A0_EBX)
+DEF(addl_A0_EBX)
+DEF(addl_A0_EBX_s1)
+DEF(addl_A0_EBX_s2)
+DEF(addl_A0_EBX_s3)
+DEF(movl_T0_EBX)
+DEF(movl_T1_EBX)
+DEF(movh_T0_EBX)
+DEF(movh_T1_EBX)
+DEF(movl_EBX_T0)
+DEF(movl_EBX_T1)
+DEF(movl_EBX_A0)
+DEF(cmovw_EBX_T1_T0)
+DEF(cmovl_EBX_T1_T0)
+DEF(movw_EBX_T0)
+DEF(movw_EBX_T1)
+DEF(movw_EBX_A0)
+DEF(movb_EBX_T0)
+DEF(movh_EBX_T0)
+DEF(movb_EBX_T1)
+DEF(movh_EBX_T1)
+DEF(movl_A0_ESP)
+DEF(addl_A0_ESP)
+DEF(addl_A0_ESP_s1)
+DEF(addl_A0_ESP_s2)
+DEF(addl_A0_ESP_s3)
+DEF(movl_T0_ESP)
+DEF(movl_T1_ESP)
+DEF(movh_T0_ESP)
+DEF(movh_T1_ESP)
+DEF(movl_ESP_T0)
+DEF(movl_ESP_T1)
+DEF(movl_ESP_A0)
+DEF(cmovw_ESP_T1_T0)
+DEF(cmovl_ESP_T1_T0)
+DEF(movw_ESP_T0)
+DEF(movw_ESP_T1)
+DEF(movw_ESP_A0)
+DEF(movb_ESP_T0)
+DEF(movh_ESP_T0)
+DEF(movb_ESP_T1)
+DEF(movh_ESP_T1)
+DEF(movl_A0_EBP)
+DEF(addl_A0_EBP)
+DEF(addl_A0_EBP_s1)
+DEF(addl_A0_EBP_s2)
+DEF(addl_A0_EBP_s3)
+DEF(movl_T0_EBP)
+DEF(movl_T1_EBP)
+DEF(movh_T0_EBP)
+DEF(movh_T1_EBP)
+DEF(movl_EBP_T0)
+DEF(movl_EBP_T1)
+DEF(movl_EBP_A0)
+DEF(cmovw_EBP_T1_T0)
+DEF(cmovl_EBP_T1_T0)
+DEF(movw_EBP_T0)
+DEF(movw_EBP_T1)
+DEF(movw_EBP_A0)
+DEF(movb_EBP_T0)
+DEF(movh_EBP_T0)
+DEF(movb_EBP_T1)
+DEF(movh_EBP_T1)
+DEF(movl_A0_ESI)
+DEF(addl_A0_ESI)
+DEF(addl_A0_ESI_s1)
+DEF(addl_A0_ESI_s2)
+DEF(addl_A0_ESI_s3)
+DEF(movl_T0_ESI)
+DEF(movl_T1_ESI)
+DEF(movh_T0_ESI)
+DEF(movh_T1_ESI)
+DEF(movl_ESI_T0)
+DEF(movl_ESI_T1)
+DEF(movl_ESI_A0)
+DEF(cmovw_ESI_T1_T0)
+DEF(cmovl_ESI_T1_T0)
+DEF(movw_ESI_T0)
+DEF(movw_ESI_T1)
+DEF(movw_ESI_A0)
+DEF(movb_ESI_T0)
+DEF(movh_ESI_T0)
+DEF(movb_ESI_T1)
+DEF(movh_ESI_T1)
+DEF(movl_A0_EDI)
+DEF(addl_A0_EDI)
+DEF(addl_A0_EDI_s1)
+DEF(addl_A0_EDI_s2)
+DEF(addl_A0_EDI_s3)
+DEF(movl_T0_EDI)
+DEF(movl_T1_EDI)
+DEF(movh_T0_EDI)
+DEF(movh_T1_EDI)
+DEF(movl_EDI_T0)
+DEF(movl_EDI_T1)
+DEF(movl_EDI_A0)
+DEF(cmovw_EDI_T1_T0)
+DEF(cmovl_EDI_T1_T0)
+DEF(movw_EDI_T0)
+DEF(movw_EDI_T1)
+DEF(movw_EDI_A0)
+DEF(movb_EDI_T0)
+DEF(movh_EDI_T0)
+DEF(movb_EDI_T1)
+DEF(movh_EDI_T1)
+DEF(addl_T0_T1_cc)
+DEF(orl_T0_T1_cc)
+DEF(andl_T0_T1_cc)
+DEF(subl_T0_T1_cc)
+DEF(xorl_T0_T1_cc)
+DEF(cmpl_T0_T1_cc)
+DEF(negl_T0_cc)
+DEF(incl_T0_cc)
+DEF(decl_T0_cc)
+DEF(testl_T0_T1_cc)
+DEF(addl_T0_T1)
+DEF(orl_T0_T1)
+DEF(andl_T0_T1)
+DEF(subl_T0_T1)
+DEF(xorl_T0_T1)
+DEF(negl_T0)
+DEF(incl_T0)
+DEF(decl_T0)
+DEF(notl_T0)
+DEF(bswapl_T0)
+DEF(mulb_AL_T0)
+DEF(imulb_AL_T0)
+DEF(mulw_AX_T0)
+DEF(imulw_AX_T0)
+DEF(mull_EAX_T0)
+DEF(imull_EAX_T0)
+DEF(imulw_T0_T1)
+DEF(imull_T0_T1)
+DEF(divb_AL_T0)
+DEF(idivb_AL_T0)
+DEF(divw_AX_T0)
+DEF(idivw_AX_T0)
+DEF(divl_EAX_T0)
+DEF(idivl_EAX_T0)
+DEF(movl_T0_im)
+DEF(movl_T1_im)
+DEF(movl_A0_im)
+DEF(addl_A0_im)
+DEF(andl_A0_ffff)
+DEF(ldub_T0_A0)
+DEF(ldsb_T0_A0)
+DEF(lduw_T0_A0)
+DEF(ldsw_T0_A0)
+DEF(ldl_T0_A0)
+DEF(ldub_T1_A0)
+DEF(ldsb_T1_A0)
+DEF(lduw_T1_A0)
+DEF(ldsw_T1_A0)
+DEF(ldl_T1_A0)
+DEF(stb_T0_A0)
+DEF(stw_T0_A0)
+DEF(stl_T0_A0)
+DEF(add_bitw_A0_T1)
+DEF(add_bitl_A0_T1)
+DEF(jmp_T0)
+DEF(jmp_im)
+DEF(int_im)
+DEF(int3)
+DEF(into)
+DEF(jb_subb)
+DEF(jz_subb)
+DEF(jbe_subb)
+DEF(js_subb)
+DEF(jl_subb)
+DEF(jle_subb)
+DEF(setb_T0_subb)
+DEF(setz_T0_subb)
+DEF(setbe_T0_subb)
+DEF(sets_T0_subb)
+DEF(setl_T0_subb)
+DEF(setle_T0_subb)
+DEF(rolb_T0_T1_cc)
+DEF(rolb_T0_T1)
+DEF(rorb_T0_T1_cc)
+DEF(rorb_T0_T1)
+DEF(rclb_T0_T1_cc)
+DEF(rcrb_T0_T1_cc)
+DEF(shlb_T0_T1_cc)
+DEF(shlb_T0_T1)
+DEF(shrb_T0_T1_cc)
+DEF(shrb_T0_T1)
+DEF(sarb_T0_T1_cc)
+DEF(sarb_T0_T1)
+DEF(adcb_T0_T1_cc)
+DEF(sbbb_T0_T1_cc)
+DEF(cmpxchgb_T0_T1_EAX_cc)
+DEF(movsb)
+DEF(rep_movsb)
+DEF(stosb)
+DEF(rep_stosb)
+DEF(lodsb)
+DEF(rep_lodsb)
+DEF(scasb)
+DEF(repz_scasb)
+DEF(repnz_scasb)
+DEF(cmpsb)
+DEF(repz_cmpsb)
+DEF(repnz_cmpsb)
+DEF(outsb)
+DEF(rep_outsb)
+DEF(insb)
+DEF(rep_insb)
+DEF(outb_T0_T1)
+DEF(inb_T0_T1)
+DEF(jb_subw)
+DEF(jz_subw)
+DEF(jbe_subw)
+DEF(js_subw)
+DEF(jl_subw)
+DEF(jle_subw)
+DEF(loopnzw)
+DEF(loopzw)
+DEF(loopw)
+DEF(jecxzw)
+DEF(setb_T0_subw)
+DEF(setz_T0_subw)
+DEF(setbe_T0_subw)
+DEF(sets_T0_subw)
+DEF(setl_T0_subw)
+DEF(setle_T0_subw)
+DEF(rolw_T0_T1_cc)
+DEF(rolw_T0_T1)
+DEF(rorw_T0_T1_cc)
+DEF(rorw_T0_T1)
+DEF(rclw_T0_T1_cc)
+DEF(rcrw_T0_T1_cc)
+DEF(shlw_T0_T1_cc)
+DEF(shlw_T0_T1)
+DEF(shrw_T0_T1_cc)
+DEF(shrw_T0_T1)
+DEF(sarw_T0_T1_cc)
+DEF(sarw_T0_T1)
+DEF(shldw_T0_T1_im_cc)
+DEF(shldw_T0_T1_ECX_cc)
+DEF(shrdw_T0_T1_im_cc)
+DEF(shrdw_T0_T1_ECX_cc)
+DEF(adcw_T0_T1_cc)
+DEF(sbbw_T0_T1_cc)
+DEF(cmpxchgw_T0_T1_EAX_cc)
+DEF(btw_T0_T1_cc)
+DEF(btsw_T0_T1_cc)
+DEF(btrw_T0_T1_cc)
+DEF(btcw_T0_T1_cc)
+DEF(bsfw_T0_cc)
+DEF(bsrw_T0_cc)
+DEF(movsw)
+DEF(rep_movsw)
+DEF(stosw)
+DEF(rep_stosw)
+DEF(lodsw)
+DEF(rep_lodsw)
+DEF(scasw)
+DEF(repz_scasw)
+DEF(repnz_scasw)
+DEF(cmpsw)
+DEF(repz_cmpsw)
+DEF(repnz_cmpsw)
+DEF(outsw)
+DEF(rep_outsw)
+DEF(insw)
+DEF(rep_insw)
+DEF(outw_T0_T1)
+DEF(inw_T0_T1)
+DEF(jb_subl)
+DEF(jz_subl)
+DEF(jbe_subl)
+DEF(js_subl)
+DEF(jl_subl)
+DEF(jle_subl)
+DEF(loopnzl)
+DEF(loopzl)
+DEF(loopl)
+DEF(jecxzl)
+DEF(setb_T0_subl)
+DEF(setz_T0_subl)
+DEF(setbe_T0_subl)
+DEF(sets_T0_subl)
+DEF(setl_T0_subl)
+DEF(setle_T0_subl)
+DEF(roll_T0_T1_cc)
+DEF(roll_T0_T1)
+DEF(rorl_T0_T1_cc)
+DEF(rorl_T0_T1)
+DEF(rcll_T0_T1_cc)
+DEF(rcrl_T0_T1_cc)
+DEF(shll_T0_T1_cc)
+DEF(shll_T0_T1)
+DEF(shrl_T0_T1_cc)
+DEF(shrl_T0_T1)
+DEF(sarl_T0_T1_cc)
+DEF(sarl_T0_T1)
+DEF(shldl_T0_T1_im_cc)
+DEF(shldl_T0_T1_ECX_cc)
+DEF(shrdl_T0_T1_im_cc)
+DEF(shrdl_T0_T1_ECX_cc)
+DEF(adcl_T0_T1_cc)
+DEF(sbbl_T0_T1_cc)
+DEF(cmpxchgl_T0_T1_EAX_cc)
+DEF(btl_T0_T1_cc)
+DEF(btsl_T0_T1_cc)
+DEF(btrl_T0_T1_cc)
+DEF(btcl_T0_T1_cc)
+DEF(bsfl_T0_cc)
+DEF(bsrl_T0_cc)
+DEF(movsl)
+DEF(rep_movsl)
+DEF(stosl)
+DEF(rep_stosl)
+DEF(lodsl)
+DEF(rep_lodsl)
+DEF(scasl)
+DEF(repz_scasl)
+DEF(repnz_scasl)
+DEF(cmpsl)
+DEF(repz_cmpsl)
+DEF(repnz_cmpsl)
+DEF(outsl)
+DEF(rep_outsl)
+DEF(insl)
+DEF(rep_insl)
+DEF(outl_T0_T1)
+DEF(inl_T0_T1)
+DEF(movsbl_T0_T0)
+DEF(movzbl_T0_T0)
+DEF(movswl_T0_T0)
+DEF(movzwl_T0_T0)
+DEF(movswl_EAX_AX)
+DEF(movsbw_AX_AL)
+DEF(movslq_EDX_EAX)
+DEF(movswl_DX_AX)
+DEF(pushl_T0)
+DEF(pushl_T1)
+DEF(popl_T0)
+DEF(addl_ESP_im)
+DEF(pushal)
+DEF(pushaw)
+DEF(popal)
+DEF(popaw)
+DEF(enterl)
+DEF(rdtsc)
+DEF(aam)
+DEF(aad)
+DEF(aaa)
+DEF(aas)
+DEF(daa)
+DEF(das)
+DEF(movl_seg_T0)
+DEF(movl_T0_seg)
+DEF(addl_A0_seg)
+DEF(jo_cc)
+DEF(jb_cc)
+DEF(jz_cc)
+DEF(jbe_cc)
+DEF(js_cc)
+DEF(jp_cc)
+DEF(jl_cc)
+DEF(jle_cc)
+DEF(seto_T0_cc)
+DEF(setb_T0_cc)
+DEF(setz_T0_cc)
+DEF(setbe_T0_cc)
+DEF(sets_T0_cc)
+DEF(setp_T0_cc)
+DEF(setl_T0_cc)
+DEF(setle_T0_cc)
+DEF(xor_T0_1)
+DEF(set_cc_op)
+DEF(movl_eflags_T0)
+DEF(movb_eflags_T0)
+DEF(movl_T0_eflags)
+DEF(cld)
+DEF(std)
+DEF(clc)
+DEF(stc)
+DEF(cmc)
+DEF(salc)
+DEF(flds_FT0_A0)
+DEF(fldl_FT0_A0)
+DEF(fild_FT0_A0)
+DEF(fildl_FT0_A0)
+DEF(fildll_FT0_A0)
+DEF(flds_ST0_A0)
+DEF(fldl_ST0_A0)
+DEF(fldt_ST0_A0)
+DEF(fild_ST0_A0)
+DEF(fildl_ST0_A0)
+DEF(fildll_ST0_A0)
+DEF(fsts_ST0_A0)
+DEF(fstl_ST0_A0)
+DEF(fstt_ST0_A0)
+DEF(fist_ST0_A0)
+DEF(fistl_ST0_A0)
+DEF(fistll_ST0_A0)
+DEF(fbld_ST0_A0)
+DEF(fbst_ST0_A0)
+DEF(fpush)
+DEF(fpop)
+DEF(fdecstp)
+DEF(fincstp)
+DEF(fmov_ST0_FT0)
+DEF(fmov_FT0_STN)
+DEF(fmov_ST0_STN)
+DEF(fmov_STN_ST0)
+DEF(fxchg_ST0_STN)
+DEF(fcom_ST0_FT0)
+DEF(fucom_ST0_FT0)
+DEF(fadd_ST0_FT0)
+DEF(fmul_ST0_FT0)
+DEF(fsub_ST0_FT0)
+DEF(fsubr_ST0_FT0)
+DEF(fdiv_ST0_FT0)
+DEF(fdivr_ST0_FT0)
+DEF(fadd_STN_ST0)
+DEF(fmul_STN_ST0)
+DEF(fsub_STN_ST0)
+DEF(fsubr_STN_ST0)
+DEF(fdiv_STN_ST0)
+DEF(fdivr_STN_ST0)
+DEF(fchs_ST0)
+DEF(fabs_ST0)
+DEF(fxam_ST0)
+DEF(fld1_ST0)
+DEF(fldl2t_ST0)
+DEF(fldl2e_ST0)
+DEF(fldpi_ST0)
+DEF(fldlg2_ST0)
+DEF(fldln2_ST0)
+DEF(fldz_ST0)
+DEF(fldz_FT0)
+DEF(f2xm1)
+DEF(fyl2x)
+DEF(fptan)
+DEF(fpatan)
+DEF(fxtract)
+DEF(fprem1)
+DEF(fprem)
+DEF(fyl2xp1)
+DEF(fsqrt)
+DEF(fsincos)
+DEF(frndint)
+DEF(fscale)
+DEF(fsin)
+DEF(fcos)
+DEF(fnstsw_A0)
+DEF(fnstsw_EAX)
+DEF(fnstcw_A0)
+DEF(fldcw_A0)
+DEF(fclex)
+DEF(fninit)