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| author | Max Chou <max.chou@sifive.com> | 2024-09-19 01:14:06 +0800 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2024-11-07 08:21:14 +1000 |
| commit | b48381b1ee55053dfad6f5c10ca277bef29ee7c5 (patch) | |
| tree | e13147e99689d860a8e43d4b08ecebde613d22df /module-common.c | |
| parent | d3b96a53190dc52d436c39b03fb7533fef044869 (diff) | |
| download | qemu-b48381b1ee55053dfad6f5c10ca277bef29ee7c5.zip qemu-b48381b1ee55053dfad6f5c10ca277bef29ee7c5.tar.gz qemu-b48381b1ee55053dfad6f5c10ca277bef29ee7c5.tar.bz2 | |
target/riscv: Set vdata.vm field for vector load/store whole register instructions
The vm field of the vector load/store whole register instruction's
encoding is 1.
The helper function of the vector load/store whole register instructions
may need the vdata.vm field to do some optimizations.
Signed-off-by: Max Chou <max.chou@sifive.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20240918171412.150107-2-max.chou@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'module-common.c')
0 files changed, 0 insertions, 0 deletions