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| author | Richard Henderson <richard.henderson@linaro.org> | 2019-09-04 12:30:20 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-09-05 13:23:03 +0100 |
| commit | 4b222545dbf30b60c033e1cd6eddda612575fd8c (patch) | |
| tree | 95e55ba08e8a0b1e63f243518aecc4d3232ce040 /memory.c | |
| parent | 3949f4675d13c587078f8f423845a3a537a22595 (diff) | |
| download | qemu-4b222545dbf30b60c033e1cd6eddda612575fd8c.zip qemu-4b222545dbf30b60c033e1cd6eddda612575fd8c.tar.gz qemu-4b222545dbf30b60c033e1cd6eddda612575fd8c.tar.bz2 | |
target/arm: Diagnose too few registers in list for LDM/STM
This has been a TODO item for quite a while. The minimum bit
count for A32 and T16 is 1, and for T32 is 2.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190904193059.26202-31-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'memory.c')
0 files changed, 0 insertions, 0 deletions