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authorPeter Maydell <peter.maydell@linaro.org>2019-10-25 13:12:16 +0100
committerPeter Maydell <peter.maydell@linaro.org>2019-10-25 13:12:16 +0100
commit7bc8f9734213b76e76631a483be13d6737c2adbc (patch)
tree57158eb4d19eeec866bb7b0363164740ac0f1f42 /linux-user
parent58560ad254fbda71d4daa6622d71683190070ee2 (diff)
parentf9469c1a01c333c08980e083e0ad3417256c8b9c (diff)
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191025' into staging
target-arm queue: * raspi boards: some cleanup * raspi: implement the bcm2835 system timer device * raspi: implement a dummy thermal sensor * misc devices: switch to ptimer transaction API * cache TB flag state to improve performance of cpu_get_tb_cpu_state * aspeed: Add an AST2600 eval board # gpg: Signature made Fri 25 Oct 2019 13:11:25 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20191025: (42 commits) hw/arm/highbank: Use AddressSpace when using write_secondary_boot() hw/arm/raspi: Use AddressSpace when using arm_boot::write_secondary_boot hw/arm/bcm2836: Rename cpus[] as cpu[].core hw/arm/bcm2836: Make the SoC code modular hw/arm/bcm2835_peripherals: Use the SYS_timer hw/timer/bcm2835: Add the BCM2835 SYS_timer hw/arm/bcm2835_peripherals: Use the thermal sensor block hw/misc/bcm2835_thermal: Add a dummy BCM2835 thermal sensor hw/watchdog/milkymist-sysctl.c: Switch to transaction-based ptimer API hw/m68k/mcf5206.c: Switch to transaction-based ptimer API hw/timer/grlib_gptimer.c: Switch to transaction-based ptimer API hw/timer/slavio_timer.c: Switch to transaction-based ptimer API hw/timer/slavio_timer: Remove useless check for NULL t->timer hw/dma/xilinx_axidma.c: Switch to transaction-based ptimer API hw/timer/xilinx_timer.c: Switch to transaction-based ptimer API hw/net/fsl_etsec/etsec.c: Switch to transaction-based ptimer API target/arm: Rely on hflags correct in cpu_get_tb_cpu_state linux-user/arm: Rebuild hflags for TARGET_WORDS_BIGENDIAN linux-user/aarch64: Rebuild hflags for TARGET_WORDS_BIGENDIAN target/arm: Rebuild hflags for M-profile NVIC ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'linux-user')
-rw-r--r--linux-user/aarch64/cpu_loop.c1
-rw-r--r--linux-user/arm/cpu_loop.c1
-rw-r--r--linux-user/syscall.c1
3 files changed, 3 insertions, 0 deletions
diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c
index 1295fa8..31c845a 100644
--- a/linux-user/aarch64/cpu_loop.c
+++ b/linux-user/aarch64/cpu_loop.c
@@ -173,6 +173,7 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
for (i = 1; i < 4; ++i) {
env->cp15.sctlr_el[i] |= SCTLR_EE;
}
+ arm_rebuild_hflags(env);
#endif
if (cpu_isar_feature(aa64_pauth, cpu)) {
diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c
index e28c45c..7be4071 100644
--- a/linux-user/arm/cpu_loop.c
+++ b/linux-user/arm/cpu_loop.c
@@ -440,6 +440,7 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
} else {
env->cp15.sctlr_el[1] |= SCTLR_B;
}
+ arm_rebuild_hflags(env);
#endif
ts->stack_base = info->start_stack;
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index f1ab81b..530c843 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -9984,6 +9984,7 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1,
aarch64_sve_narrow_vq(env, vq);
}
env->vfp.zcr_el[1] = vq - 1;
+ arm_rebuild_hflags(env);
ret = vq * 16;
}
return ret;