aboutsummaryrefslogtreecommitdiff
path: root/linux-user
diff options
context:
space:
mode:
authorStefan Hajnoczi <stefanha@redhat.com>2025-01-21 08:27:20 -0500
committerStefan Hajnoczi <stefanha@redhat.com>2025-01-21 08:28:33 -0500
commit32a97c5d05c5deb54a42315d48cecf86cbeadaf4 (patch)
treeca5d478d79623fb765d27d186e2640b224676141 /linux-user
parentd6430c17d7113d3c38480dc34e59d00b0504e2f7 (diff)
parentdb1649823d4f27b924a5aa5f9e0111457accb798 (diff)
downloadqemu-32a97c5d05c5deb54a42315d48cecf86cbeadaf4.zip
qemu-32a97c5d05c5deb54a42315d48cecf86cbeadaf4.tar.gz
qemu-32a97c5d05c5deb54a42315d48cecf86cbeadaf4.tar.bz2
Merge tag 'pull-tcg-20250117' of https://gitlab.com/rth7680/qemu into staging
tcg: - Add TCGOP_TYPE, TCGOP_FLAGS. - Pass type and flags to tcg_op_supported, tcg_target_op_def. - Split out tcg-target-has.h and unexport from tcg.h. - Reorg constraint processing; constify TCGOpDef. - Make extract, sextract, deposit opcodes mandatory. - Merge ext{8,16,32}{s,u} opcodes into {s}extract. tcg/mips: Expand bswap unconditionally tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64 tcg/riscv: Use BEXTI for single-bit extractions tcg/sparc64: Use SRA, SRL for {s}extract_i64 disas/riscv: Guard dec->cfg dereference for host disassemble util/cpuinfo-riscv: Detect Zbs accel/tcg: Call tcg_tb_insert() for one-insn TBs linux-user: Add missing /proc/cpuinfo fields for sparc # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmeKnzUdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+Kvgf+LG9UjXlWF9GK923E # TllBL2rLf1OOdtTXWO15VcvGMoWDwB3tVBdhihdvXmnWju+WbfMk6mct5NhzsKn9 # LmuugMIZs+hMROj+bgMK8x47jRIh5N2rDYxcEgmyfIpYb2o9qvyqKecGVRlSJTCE # bmt5UFbvPThBb8upoMfq3F6evuMx0szBP7wrOwSR/VGpmzIr20UTEWo6I1ALp4uj # paFaysYol4em3dIhkiuV9cL7E0EIObaNa7l9RUci/BmTq+JaVxUnW1Y2i0PEwKwG # FJSfYTJk3wBgAVxC2zC2g3ZM7uKuecSXMpiFopTiuyQLp7Q61i9kCNvEq0qY5tdb # DaqR/g== # =cv4O # -----END PGP SIGNATURE----- # gpg: Signature made Fri 17 Jan 2025 13:19:33 EST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20250117' of https://gitlab.com/rth7680/qemu: (68 commits) softfloat: Constify helpers returning float_status field accel/tcg: Call tcg_tb_insert() for one-insn TBs tcg: Document tb_lookup() and tcg_tb_lookup() linux-user: Add missing /proc/cpuinfo fields for sparc tcg/riscv: Use BEXTI for single-bit extractions util/cpuinfo-riscv: Detect Zbs tcg: Remove TCG_TARGET_HAS_deposit_{i32,i64} tcg: Remove TCG_TARGET_HAS_{s}extract_{i32,i64} tcg/tci: Remove assertions for deposit and extract tcg/tci: Provide TCG_TARGET_{s}extract_valid tcg/sparc64: Use SRA, SRL for {s}extract_i64 tcg/s390x: Fold the ext{8,16,32}[us] cases into {s}extract tcg/riscv: Use SRAIW, SRLIW for {s}extract_i64 tcg/riscv64: Fold the ext{8,16,32}[us] cases into {s}extract tcg/ppc: Fold the ext{8,16,32}[us] cases into {s}extract tcg/mips: Fold the ext{8,16,32}[us] cases into {s}extract tcg/loongarch64: Fold the ext{8,16,32}[us] cases into {s}extract tcg/arm: Add full [US]XT[BH] into {s}extract tcg/aarch64: Expand extract with offset 0 with andi tcg/aarch64: Provide TCG_TARGET_{s}extract_valid ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'linux-user')
-rw-r--r--linux-user/sparc/target_proc.h20
1 files changed, 19 insertions, 1 deletions
diff --git a/linux-user/sparc/target_proc.h b/linux-user/sparc/target_proc.h
index 3bb3134..744fa10 100644
--- a/linux-user/sparc/target_proc.h
+++ b/linux-user/sparc/target_proc.h
@@ -8,7 +8,25 @@
static int open_cpuinfo(CPUArchState *cpu_env, int fd)
{
- dprintf(fd, "type\t\t: sun4u\n");
+ int i, num_cpus;
+ const char *cpu_type;
+
+ num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
+ if (cpu_env->def.features & CPU_FEATURE_HYPV) {
+ cpu_type = "sun4v";
+ } else {
+ cpu_type = "sun4u";
+ }
+
+ dprintf(fd, "cpu\t\t: %s (QEMU)\n", cpu_env->def.name);
+ dprintf(fd, "type\t\t: %s\n", cpu_type);
+ dprintf(fd, "ncpus probed\t: %d\n", num_cpus);
+ dprintf(fd, "ncpus active\t: %d\n", num_cpus);
+ dprintf(fd, "State:\n");
+ for (i = 0; i < num_cpus; i++) {
+ dprintf(fd, "CPU%d:\t\t: online\n", i);
+ }
+
return 0;
}
#define HAVE_ARCH_PROC_CPUINFO