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author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2014-06-09 15:43:23 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2014-06-09 16:06:11 +0100 |
commit | f1ecb913d81199758383b8cbc15f4eb435b91753 (patch) | |
tree | f89668491c992e0bce53847a868db7c6fdfa764d /ioport.c | |
parent | d615efac7c4dc0984de31791c5c7d6b06408aadb (diff) | |
download | qemu-f1ecb913d81199758383b8cbc15f4eb435b91753.zip qemu-f1ecb913d81199758383b8cbc15f4eb435b91753.tar.gz qemu-f1ecb913d81199758383b8cbc15f4eb435b91753.tar.bz2 |
target-arm: add support for v8 SHA1 and SHA256 instructions
This adds support for the SHA1 and SHA256 instructions that are available
on some v8 implementations of Aarch32.
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1401386724-26529-2-git-send-email-peter.maydell@linaro.org
[PMM:
* rebase
* fix bad indent
* add a missing UNDEF check for Q!=1 in the 3-reg SHA1/SHA256 case
* use g_assert_not_reached()
* don't re-extract bit 6 for the 2-reg-misc encodings
* set the ELF HWCAP2 bits for the new features
]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'ioport.c')
0 files changed, 0 insertions, 0 deletions