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| author | Mostafa Saleh <smostafa@google.com> | 2024-07-15 08:45:13 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-07-18 13:49:30 +0100 |
| commit | eb41313c4be1d9b3c8fcd43ee706c10eabd5c188 (patch) | |
| tree | 6c436595544f4061b5e3f5c22d9f75d251093272 /include | |
| parent | 1ea8a6f59b8d6dbcc5d0aa59380ae45a18231b88 (diff) | |
| download | qemu-eb41313c4be1d9b3c8fcd43ee706c10eabd5c188.zip qemu-eb41313c4be1d9b3c8fcd43ee706c10eabd5c188.tar.gz qemu-eb41313c4be1d9b3c8fcd43ee706c10eabd5c188.tar.bz2 | |
hw/arm/smmu: Introduce smmu_iotlb_inv_asid_vmid
Soon, Instead of doing TLB invalidation by ASID only, VMID will be
also required.
Add smmu_iotlb_inv_asid_vmid() which invalidates by both ASID and VMID.
However, at the moment this function is only used in SMMU_CMD_TLBI_NH_ASID
which is a stage-1 command, so passing VMID = -1 keeps the original
behaviour.
Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Mostafa Saleh <smostafa@google.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20240715084519.1189624-14-smostafa@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/arm/smmu-common.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h index da9ff45..eaee867 100644 --- a/include/hw/arm/smmu-common.h +++ b/include/hw/arm/smmu-common.h @@ -213,7 +213,7 @@ void smmu_iotlb_insert(SMMUState *bs, SMMUTransCfg *cfg, SMMUTLBEntry *entry); SMMUIOTLBKey smmu_get_iotlb_key(int asid, int vmid, uint64_t iova, uint8_t tg, uint8_t level); void smmu_iotlb_inv_all(SMMUState *s); -void smmu_iotlb_inv_asid(SMMUState *s, int asid); +void smmu_iotlb_inv_asid_vmid(SMMUState *s, int asid, int vmid); void smmu_iotlb_inv_vmid(SMMUState *s, int vmid); void smmu_iotlb_inv_iova(SMMUState *s, int asid, int vmid, dma_addr_t iova, uint8_t tg, uint64_t num_pages, uint8_t ttl); |