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authorRichard Henderson <richard.henderson@linaro.org>2022-07-26 12:57:20 -0700
committerRichard Henderson <richard.henderson@linaro.org>2022-07-26 12:57:20 -0700
commite5b6555fb8e8a91dd1d612e2e2d66bf5f43ad1dd (patch)
tree5328762ce117fbe6dbb2ac2a3b593c229f404326 /include
parentf6cce6bcb2ef959cdd4da0e368f7c72045f21d6d (diff)
parent0522be9a0c0094088ccef7aab352c57f483ca250 (diff)
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Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
pc,virtio: fixes Several fixes. From now on, regression fixes only. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmLgQr8PHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpGUUIAKtNhrnKopGm4LlRpx8zN3Jc1Jo0nb648gaM # Oyi+Pl8+hpESUhaWN10XDk38/QuPQfIFeR2ZhfYjFTRlZE+n3X9LVlwL8ejjP8KH # AcWm78Ff/SLA45aMKMmw74pvEDNsoPYTp7TrfeIej5ub8BIXr8+8pqDdIR9WwtWO # PbhLNXkTT2yLEs6jCVT4/dyh7zivSkrY7G/RVmtUaFe3PgY8fdW2z3+Txz7UIMgw # CQoGuAucCO5ToBbs2CbT0V5yxY6G5VO6Qd8g0PzDW4M6GsY/Xr5QCnyJe0jTW0d6 # Dcc7UZFAzGNzyQCxHCic9xwTO+ZcJPJlH5TwknunxOb9xwCx4Qs= # =zN41 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 26 Jul 2022 12:38:39 PM PDT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [undefined] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu: hw/virtio/virtio-iommu: Enforce power-of-two notify for both MAP and UNMAP i386/pc: restrict AMD only enforcing of 1Tb hole to new machine type i386/pc: relocate 4g start to 1T where applicable i386/pc: bounds check phys-bits against max used GPA i386/pc: factor out device_memory base/size to helper i386/pc: handle unitialized mr in pc_get_cxl_range_end() i386/pc: factor out cxl range start to helper i386/pc: factor out cxl range end to helper i386/pc: factor out above-4g end to an helper i386/pc: pass pci_hole64_size to pc_memory_init() i386/pc: create pci-host qdev prior to pc_memory_init() hw/i386: add 4g boundary start to X86MachineState hw/cxl: Fix size of constant in interleave granularity function. hw/i386/pc: Always place CXL Memory Regions after device_memory hw/machine: Clear out left over CXL related pointer from move of state handling to machines. acpi/nvdimm: Define trace events for NVDIMM and substitute nvdimm_debug() Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/boards.h1
-rw-r--r--include/hw/cxl/cxl_component.h2
-rw-r--r--include/hw/i386/pc.h4
-rw-r--r--include/hw/i386/x86.h3
-rw-r--r--include/hw/mem/nvdimm.h8
-rw-r--r--include/hw/pci-host/i440fx.h3
6 files changed, 9 insertions, 12 deletions
diff --git a/include/hw/boards.h b/include/hw/boards.h
index d94edce..7b416c9 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -360,7 +360,6 @@ struct MachineState {
CpuTopology smp;
struct NVDIMMState *nvdimms_state;
struct NumaState *numa_state;
- CXLFixedMemoryWindowOptionsList *cfmws_list;
};
#define DEFINE_MACHINE(namestr, machine_initfn) \
diff --git a/include/hw/cxl/cxl_component.h b/include/hw/cxl/cxl_component.h
index 70b5018..94ec2f0 100644
--- a/include/hw/cxl/cxl_component.h
+++ b/include/hw/cxl/cxl_component.h
@@ -215,7 +215,7 @@ uint8_t cxl_interleave_granularity_enc(uint64_t gran, Error **errp);
static inline hwaddr cxl_decode_ig(int ig)
{
- return 1 << (ig + 8);
+ return 1ULL << (ig + 8);
}
CXLComponentState *cxl_get_hb_cstate(PCIHostState *hb);
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 2a8ffbc..8435733 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -118,6 +118,7 @@ struct PCMachineClass {
bool has_reserved_memory;
bool enforce_aligned_dimm;
bool broken_reserved_end;
+ bool enforce_amd_1tb_hole;
/* generate legacy CPU hotplug AML */
bool legacy_cpu_hotplug;
@@ -162,7 +163,8 @@ void xen_load_linux(PCMachineState *pcms);
void pc_memory_init(PCMachineState *pcms,
MemoryRegion *system_memory,
MemoryRegion *rom_memory,
- MemoryRegion **ram_memory);
+ MemoryRegion **ram_memory,
+ uint64_t pci_hole64_size);
uint64_t pc_pci_hole64_start(void);
DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_basic_device_init(struct PCMachineState *pcms,
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
index 6bdf1f6..62fa577 100644
--- a/include/hw/i386/x86.h
+++ b/include/hw/i386/x86.h
@@ -56,6 +56,9 @@ struct X86MachineState {
/* RAM information (sizes, addresses, configuration): */
ram_addr_t below_4g_mem_size, above_4g_mem_size;
+ /* Start address of the initial RAM above 4G */
+ uint64_t above_4g_mem_start;
+
/* CPU and apic information: */
bool apic_xrupt_override;
unsigned pci_irq_mask;
diff --git a/include/hw/mem/nvdimm.h b/include/hw/mem/nvdimm.h
index cf8f59b..acf887c 100644
--- a/include/hw/mem/nvdimm.h
+++ b/include/hw/mem/nvdimm.h
@@ -29,14 +29,6 @@
#include "hw/acpi/aml-build.h"
#include "qom/object.h"
-#define NVDIMM_DEBUG 0
-#define nvdimm_debug(fmt, ...) \
- do { \
- if (NVDIMM_DEBUG) { \
- fprintf(stderr, "nvdimm: " fmt, ## __VA_ARGS__); \
- } \
- } while (0)
-
/*
* The minimum label data size is required by NVDIMM Namespace
* specification, see the chapter 2 Namespaces:
diff --git a/include/hw/pci-host/i440fx.h b/include/hw/pci-host/i440fx.h
index 52518db..d02bf1e 100644
--- a/include/hw/pci-host/i440fx.h
+++ b/include/hw/pci-host/i440fx.h
@@ -35,7 +35,8 @@ struct PCII440FXState {
#define TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE "igd-passthrough-i440FX"
-PCIBus *i440fx_init(const char *host_type, const char *pci_type,
+PCIBus *i440fx_init(const char *pci_type,
+ DeviceState *dev,
MemoryRegion *address_space_mem,
MemoryRegion *address_space_io,
ram_addr_t ram_size,