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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-09-08 17:38:43 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-09-08 17:38:43 +0100 |
| commit | d5523a13656fb8df902a15a9fd8bd652b85e97e0 (patch) | |
| tree | 14ea1a5159c468af35c3a85afae1b9cbbd9615d1 /include | |
| parent | 72889c8a809f4c65796b98d5af6a18c92510ed86 (diff) | |
| download | qemu-d5523a13656fb8df902a15a9fd8bd652b85e97e0.zip qemu-d5523a13656fb8df902a15a9fd8bd652b85e97e0.tar.gz qemu-d5523a13656fb8df902a15a9fd8bd652b85e97e0.tar.bz2 | |
hw/intc/arm_gic: Actually set the active bits for active interrupts
Although we were correctly handling interrupts becoming active
and then inactive, we weren't actually exposing this to the guest
by setting the 'active' flag for the interrupt, so reads
of GICD_ICACTIVERn and GICD_ISACTIVERn would generally incorrectly
return zeroes. Correct this oversight.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1438089748-5528-6-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions