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| author | Shashi Mallela <shashi.mallela@linaro.org> | 2021-09-13 16:07:23 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-13 19:45:01 +0100 |
| commit | c694cb4cada0cd6c646f704e868072bbd4f55798 (patch) | |
| tree | bb83c37daf5e12cfcaa29306b7ad0d40f8381830 /include | |
| parent | 7eca39e071fc026f06eb3bbe9257d686f1d7e2e1 (diff) | |
| download | qemu-c694cb4cada0cd6c646f704e868072bbd4f55798.zip qemu-c694cb4cada0cd6c646f704e868072bbd4f55798.tar.gz qemu-c694cb4cada0cd6c646f704e868072bbd4f55798.tar.bz2 | |
hw/intc: GICv3 ITS Command processing
Added ITS command queue handling for MAPTI,MAPI commands,handled ITS
translation which triggers an LPI via INT command as well as write
to GITS_TRANSLATER register,defined enum to differentiate between ITS
command interrupt trigger and GITS_TRANSLATER based interrupt trigger.
Each of these commands make use of other functionalities implemented to
get device table entry,collection table entry or interrupt translation
table entry required for their processing.
Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210910143951.92242-5-shashi.mallela@linaro.org
[PMM: use INTERRUPT for ItsCmdType enum name to avoid
conflict with INT type defined by Windows headers]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/intc/arm_gicv3_common.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h index 1fd5ced..0715b0b 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -36,6 +36,8 @@ #define GICV3_MAXIRQ 1020 #define GICV3_MAXSPI (GICV3_MAXIRQ - GIC_INTERNAL) +#define GICV3_LPI_INTID_START 8192 + #define GICV3_REDIST_SIZE 0x20000 /* Number of SGI target-list bits */ |