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| author | Sergey Kambalin <serg.oker@gmail.com> | 2024-02-25 18:02:23 -0600 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-02-27 13:01:42 +0000 |
| commit | 96b22ee585a50bf136973aa893e139798d9d4df3 (patch) | |
| tree | c0dd2ac11936b65e2e7c41c95da348da24114eaf /include | |
| parent | dcf1d8cdfbe6ab56456380ddc13f551df070a539 (diff) | |
| download | qemu-96b22ee585a50bf136973aa893e139798d9d4df3.zip qemu-96b22ee585a50bf136973aa893e139798d9d4df3.tar.gz qemu-96b22ee585a50bf136973aa893e139798d9d4df3.tar.bz2 | |
hw/arm/bcm2838: Add GIC-400 to BCM2838 SoC
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20240226000259.2752893-6-sergey.kambalin@auriga.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/arm/bcm2838.h | 2 | ||||
| -rw-r--r-- | include/hw/arm/bcm2838_peripherals.h | 37 |
2 files changed, 39 insertions, 0 deletions
diff --git a/include/hw/arm/bcm2838.h b/include/hw/arm/bcm2838.h index bddc25c..e53c7bed 100644 --- a/include/hw/arm/bcm2838.h +++ b/include/hw/arm/bcm2838.h @@ -10,6 +10,7 @@ #define BCM2838_H #include "hw/arm/bcm2836.h" +#include "hw/intc/arm_gic.h" #include "hw/arm/bcm2838_peripherals.h" #define BCM2838_PERI_LOW_BASE 0xfc000000 @@ -24,6 +25,7 @@ struct BCM2838State { BCM283XBaseState parent_obj; /*< public >*/ BCM2838PeripheralState peripherals; + GICState gic; }; #endif /* BCM2838_H */ diff --git a/include/hw/arm/bcm2838_peripherals.h b/include/hw/arm/bcm2838_peripherals.h index 7039b67..d078317 100644 --- a/include/hw/arm/bcm2838_peripherals.h +++ b/include/hw/arm/bcm2838_peripherals.h @@ -11,6 +11,39 @@ #include "hw/arm/bcm2835_peripherals.h" +/* SPI */ +#define GIC_SPI_INTERRUPT_MBOX 33 +#define GIC_SPI_INTERRUPT_MPHI 40 +#define GIC_SPI_INTERRUPT_DWC2 73 +#define GIC_SPI_INTERRUPT_DMA_0 80 +#define GIC_SPI_INTERRUPT_DMA_6 86 +#define GIC_SPI_INTERRUPT_DMA_7_8 87 +#define GIC_SPI_INTERRUPT_DMA_9_10 88 +#define GIC_SPI_INTERRUPT_AUX_UART1 93 +#define GIC_SPI_INTERRUPT_SDHOST 120 +#define GIC_SPI_INTERRUPT_UART0 121 +#define GIC_SPI_INTERRUPT_RNG200 125 +#define GIC_SPI_INTERRUPT_EMMC_EMMC2 126 +#define GIC_SPI_INTERRUPT_PCI_INT_A 143 +#define GIC_SPI_INTERRUPT_GENET_A 157 +#define GIC_SPI_INTERRUPT_GENET_B 158 + + +/* GPU (legacy) DMA interrupts */ +#define GPU_INTERRUPT_DMA0 16 +#define GPU_INTERRUPT_DMA1 17 +#define GPU_INTERRUPT_DMA2 18 +#define GPU_INTERRUPT_DMA3 19 +#define GPU_INTERRUPT_DMA4 20 +#define GPU_INTERRUPT_DMA5 21 +#define GPU_INTERRUPT_DMA6 22 +#define GPU_INTERRUPT_DMA7_8 23 +#define GPU_INTERRUPT_DMA9_10 24 +#define GPU_INTERRUPT_DMA11 25 +#define GPU_INTERRUPT_DMA12 26 +#define GPU_INTERRUPT_DMA13 27 +#define GPU_INTERRUPT_DMA14 28 +#define GPU_INTERRUPT_DMA15 31 #define TYPE_BCM2838_PERIPHERALS "bcm2838-peripherals" OBJECT_DECLARE_TYPE(BCM2838PeripheralState, BCM2838PeripheralClass, @@ -24,6 +57,10 @@ struct BCM2838PeripheralState { MemoryRegion peri_low_mr; MemoryRegion peri_low_mr_alias; MemoryRegion mphi_mr_alias; + + OrIRQState mmc_irq_orgate; + OrIRQState dma_7_8_irq_orgate; + OrIRQState dma_9_10_irq_orgate; }; struct BCM2838PeripheralClass { |