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authorRichard Henderson <richard.henderson@linaro.org>2022-06-11 08:18:55 -0700
committerRichard Henderson <richard.henderson@linaro.org>2022-06-11 08:18:55 -0700
commit8b7f856e9dca75255af5037b68df385928616dab (patch)
tree533c6b2a6502535e2e5108d309d94b7d373b4125 /include
parent30796f556790631c86c733ab06756981be0e1def (diff)
parent37da3bcf01ccd19336fd8f43bedcd0841d71bb6a (diff)
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Merge tag 'mips-20220611' of https://github.com/philmd/qemu into staging
MIPS patches queue - Various TCG fixes (Marcin Nowakowski, Ni Hui, Stefan Pejic, Stefan Pejic) - Sysbus floppy controller fix (Peter Maydell) - QOM'ification of PIIX southbridge (Mark Cave-Ayland, Bernhard Beschow) - Various fixes on ISA devices commonly used by x86/mips machines (Bernhard) - Few cleanups in accel/tcg & documentation (Bernhard) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmKkbtEACgkQ4+MsLN6t # wN7uPg/+K4TawuNb5CFPa67gdP+7QqOQJF7ADJm4jDgJN0qRg8uDDE1/cSvtD1xn # ttWfy/AHCtuCwLWTJ5T3QCIXJBrEmfqu/RkGoljnIDWZBKcnrzsTmBOBylDbO8zC # ZuNiOr0CUzSoCJsQ297U8tYW+2hDMSLvJrwbT97vqoSETsoTbBX/fFqQ7zdOqU5d # e0CDiJNIinjObtylCKWe0JP1pRyWRexWX4jEPeEYR2eCE49EoZi47JJmGFtQJB5j # wtVO48bN1Wn97mqeML6JEGXfgNa672bgh82Gulfyrx+g9fBM1Al8nEy/mmbUkgd6 # Imrt0jxp2Cqtl6ENC6CB8mT5ZjMKPsG5rzvNvaQAoM1jhZbZQXx3l1V/pSU5cnf5 # miVbkjepl9NVvFZ4bJ4oHOCA9l7BaZoUmRa5W0XOZW9y8Ph2H4kUZDI+g4Rif136 # Wgf5EqbFi/tJlC11S3vLwDZJmw2a3LM1esldJom3/EgA0e8t5o2xY/9lGee8WDAe # dn+t8etpK4WMQ/694WAR051BHiH2XP2DvsX6Ioi82aYOqL6NgGJYAI+/CP8Mhteg # Rmqg+p+7jRGqtH1QH3i/77TYJB/J0QqXp8lBHwfdCAyCzt3BkA/e5nXF5Ez0Am3m # i160SjSRejVaLc5bxTXiKLvZHUekea0PNtajWFjv42BxwlbgmEY= # =KtFC # -----END PGP SIGNATURE----- # gpg: Signature made Sat 11 Jun 2022 03:30:41 AM PDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] * tag 'mips-20220611' of https://github.com/philmd/qemu: (49 commits) docs/devel: Fix link to developer mailing lists accel/tcg: Inline dump_opcount_info() and remove it accel/tcg/cpu-exec: Unexport dump_drift_info() hw/net/fsl_etsec/etsec: Remove obsolete and unused etsec_create() hw/i386/pc: Remove orphan declarations hw/i386/pc: Unexport functions used only internally hw/i386/pc: Unexport PC_CPU_MODEL_IDS macro hw/audio/cs4231a: Const'ify global tables hw: Reuse TYPE_I8042 define hw/rtc/mc146818rtc: QOM'ify io_base offset hw/i386/microvm-dt: Determine mc146818rtc's IRQ number from QOM property hw/i386/microvm-dt: Force explicit failure if retrieving QOM property fails hw/isa/piix3: Inline and remove piix3_create() hw/isa/piix3: Factor out ISABus retrieval from piix3_create() hw/isa/piix3: QOM'ify PCI device creation and wiring hw/isa/piix3: Move pci_map_irq_fn near pci_set_irq_fn hw/isa/piix4: Inline and remove piix4_create() hw/isa/piix4: QOM'ify PIIX4 PM creation hw/isa/piix4: Factor out ISABus retrieval from piix4_create() hw/isa/piix4: QOM'ify PCI device creation and wiring ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/exec/cpu-all.h3
-rw-r--r--include/hw/acpi/piix4.h75
-rw-r--r--include/hw/block/fdc.h3
-rw-r--r--include/hw/i386/pc.h14
-rw-r--r--include/hw/isa/isa.h2
-rw-r--r--include/hw/rtc/mc146818rtc.h2
-rw-r--r--include/hw/southbridge/piix.h12
7 files changed, 80 insertions, 31 deletions
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 5d5290d..f5bda2c 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -419,11 +419,8 @@ static inline bool tlb_hit(target_ulong tlb_addr, target_ulong addr)
}
#ifdef CONFIG_TCG
-/* accel/tcg/cpu-exec.c */
-void dump_drift_info(GString *buf);
/* accel/tcg/translate-all.c */
void dump_exec_info(GString *buf);
-void dump_opcount_info(GString *buf);
#endif /* CONFIG_TCG */
#endif /* !CONFIG_USER_ONLY */
diff --git a/include/hw/acpi/piix4.h b/include/hw/acpi/piix4.h
new file mode 100644
index 0000000..32686a7
--- /dev/null
+++ b/include/hw/acpi/piix4.h
@@ -0,0 +1,75 @@
+/*
+ * ACPI implementation
+ *
+ * Copyright (c) 2006 Fabrice Bellard
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License version 2.1 as published by the Free Software Foundation.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>
+ *
+ * Contributions after 2012-01-13 are licensed under the terms of the
+ * GNU GPL, version 2 or (at your option) any later version.
+ */
+
+#ifndef HW_ACPI_PIIX4_H
+#define HW_ACPI_PIIX4_H
+
+#include "hw/pci/pci.h"
+#include "hw/acpi/acpi.h"
+#include "hw/acpi/cpu_hotplug.h"
+#include "hw/acpi/memory_hotplug.h"
+#include "hw/acpi/pcihp.h"
+#include "hw/i2c/pm_smbus.h"
+#include "hw/isa/apm.h"
+
+#define TYPE_PIIX4_PM "PIIX4_PM"
+OBJECT_DECLARE_SIMPLE_TYPE(PIIX4PMState, PIIX4_PM)
+
+struct PIIX4PMState {
+ /*< private >*/
+ PCIDevice parent_obj;
+ /*< public >*/
+
+ MemoryRegion io;
+ uint32_t io_base;
+
+ MemoryRegion io_gpe;
+ ACPIREGS ar;
+
+ APMState apm;
+
+ PMSMBus smb;
+ uint32_t smb_io_base;
+
+ qemu_irq irq;
+ qemu_irq smi_irq;
+ bool smm_enabled;
+ bool smm_compat;
+ Notifier machine_ready;
+ Notifier powerdown_notifier;
+
+ AcpiPciHpState acpi_pci_hotplug;
+ bool use_acpi_hotplug_bridge;
+ bool use_acpi_root_pci_hotplug;
+ bool not_migrate_acpi_index;
+
+ uint8_t disable_s3;
+ uint8_t disable_s4;
+ uint8_t s4_val;
+
+ bool cpu_hotplug_legacy;
+ AcpiCpuHotplug gpe_cpu;
+ CPUHotplugState cpuhp_state;
+
+ MemHotplugState acpi_memory_hotplug;
+};
+
+#endif
diff --git a/include/hw/block/fdc.h b/include/hw/block/fdc.h
index 1ecca7c..35248c0 100644
--- a/include/hw/block/fdc.h
+++ b/include/hw/block/fdc.h
@@ -10,8 +10,7 @@
#define TYPE_ISA_FDC "isa-fdc"
void isa_fdc_init_drives(ISADevice *fdc, DriveInfo **fds);
-void fdctrl_init_sysbus(qemu_irq irq, int dma_chann,
- hwaddr mmio_base, DriveInfo **fds);
+void fdctrl_init_sysbus(qemu_irq irq, hwaddr mmio_base, DriveInfo **fds);
void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base,
DriveInfo **fds, qemu_irq *fdc_tc);
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 003a86b..b7735dc 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -167,19 +167,13 @@ void pc_basic_device_init(struct PCMachineState *pcms,
ISADevice **rtc_state,
bool create_fdctrl,
uint32_t hpet_irqs);
-void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
void pc_cmos_init(PCMachineState *pcms,
BusState *ide0, BusState *ide1,
ISADevice *s);
void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
-void pc_pci_device_init(PCIBus *pci_bus);
-
-typedef void (*cpu_set_smm_t)(int smm, void *arg);
void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
-ISADevice *pc_find_fdc0(void);
-
/* port92.c */
#define PORT92_A20_LINE "a20"
@@ -288,14 +282,6 @@ extern const size_t pc_compat_1_5_len;
extern GlobalProperty pc_compat_1_4[];
extern const size_t pc_compat_1_4_len;
-/* Helper for setting model-id for CPU models that changed model-id
- * depending on QEMU versions up to QEMU 2.4.
- */
-#define PC_CPU_MODEL_IDS(v) \
- { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
- { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
- { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },
-
#define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
{ \
diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h
index 6f93800..6c8a8a9 100644
--- a/include/hw/isa/isa.h
+++ b/include/hw/isa/isa.h
@@ -129,6 +129,4 @@ static inline ISABus *isa_bus_from_device(ISADevice *d)
return ISA_BUS(qdev_get_parent_bus(DEVICE(d)));
}
-#define TYPE_PIIX4_PCI_DEVICE "piix4-isa"
-
#endif
diff --git a/include/hw/rtc/mc146818rtc.h b/include/hw/rtc/mc146818rtc.h
index 33d8575..1db0fce 100644
--- a/include/hw/rtc/mc146818rtc.h
+++ b/include/hw/rtc/mc146818rtc.h
@@ -26,6 +26,7 @@ struct RTCState {
uint8_t cmos_data[128];
uint8_t cmos_index;
uint8_t isairq;
+ uint16_t io_base;
int32_t base_year;
uint64_t base_rtc;
uint64_t last_update;
@@ -49,7 +50,6 @@ struct RTCState {
};
#define RTC_ISA_IRQ 8
-#define RTC_ISA_BASE 0x70
ISADevice *mc146818_rtc_init(ISABus *bus, int base_year,
qemu_irq intercept_irq);
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h
index f63f83e..2693778 100644
--- a/include/hw/southbridge/piix.h
+++ b/include/hw/southbridge/piix.h
@@ -15,12 +15,6 @@
#include "hw/pci/pci.h"
#include "qom/object.h"
-#define TYPE_PIIX4_PM "PIIX4_PM"
-
-I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
- qemu_irq sci_irq, qemu_irq smi_irq,
- int smm_enabled, DeviceState **piix4_pm);
-
/* PIRQRC[A:D]: PIRQx Route Control Registers */
#define PIIX_PIRQCA 0x60
#define PIIX_PIRQCB 0x61
@@ -70,8 +64,8 @@ typedef struct PIIXState PIIX3State;
DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE,
TYPE_PIIX3_PCI_DEVICE)
-PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus);
-
-DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus);
+#define TYPE_PIIX3_DEVICE "PIIX3"
+#define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen"
+#define TYPE_PIIX4_PCI_DEVICE "piix4-isa"
#endif