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author | Peter Maydell <peter.maydell@linaro.org> | 2019-03-15 11:39:42 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2019-03-15 11:39:42 +0000 |
commit | 8b088d3f8ab5642020d28fa0c2a8d938bc5f3592 (patch) | |
tree | baa8a2a52fa042898b594ef4dc081de7325a5683 /include | |
parent | 7074ab12c81a1b2b1e0e1c40983f56b2c5ccc494 (diff) | |
parent | 5de56742a3c91de3d646326bec43a989bba83ca4 (diff) | |
download | qemu-8b088d3f8ab5642020d28fa0c2a8d938bc5f3592.zip qemu-8b088d3f8ab5642020d28fa0c2a8d938bc5f3592.tar.gz qemu-8b088d3f8ab5642020d28fa0c2a8d938bc5f3592.tar.bz2 |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190315' into staging
target-arm queue:
* Add missing SVE-enabled check to ADDVL/ADDPL/RDVL
* virt-acpi-build: use PCIE_MMCFG_BUS to retrieve end_bus_number
* virt-acpi-build: Fix SMMUv3 GSIV values
* Allow EL0 to write to arch timer registers, not just read them
* bcm2836_control: Implement local timer
# gpg: Signature made Fri 15 Mar 2019 11:37:29 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20190315:
target/arm: Check access permission to ADDVL/ADDPL/RDVL
hw/arm/virt-acpi-build: use PCIE_MMCFG_BUS to retrieve end_bus_number
target/arm: change arch timer registers access permission
hw/arm/virt-acpi-build: Fix SMMUv3 GSIV values
hw/intc/bcm2836_control: Implement local timer
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r-- | include/hw/intc/bcm2836_control.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/include/hw/intc/bcm2836_control.h b/include/hw/intc/bcm2836_control.h index 613f3c4..de061b8 100644 --- a/include/hw/intc/bcm2836_control.h +++ b/include/hw/intc/bcm2836_control.h @@ -5,6 +5,9 @@ * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft * Written by Andrew Baumann * + * ARM Local Timer IRQ Copyright (c) 2019. Zoltán Baldaszti + * Added basic IRQ_TIMER interrupt support + * * This code is licensed under the GNU GPLv2 and later. */ @@ -12,6 +15,7 @@ #define BCM2836_CONTROL_H #include "hw/sysbus.h" +#include "qemu/timer.h" /* 4 mailboxes per core, for 16 total */ #define BCM2836_NCORES 4 @@ -39,6 +43,11 @@ typedef struct BCM2836ControlState { bool gpu_irq, gpu_fiq; uint8_t timerirqs[BCM2836_NCORES]; + /* local timer */ + QEMUTimer timer; + uint32_t local_timer_control; + uint8_t route_localtimer; + /* interrupt source registers, post-routing (also input-derived; visible) */ uint32_t irqsrc[BCM2836_NCORES]; uint32_t fiqsrc[BCM2836_NCORES]; |