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authorJean-Christophe Dubois <jcd@tribudubois.net>2023-08-31 09:45:17 +0100
committerPeter Maydell <peter.maydell@linaro.org>2023-08-31 09:45:17 +0100
commit736988a040b58b7021445580634d4d2d35a4a6cc (patch)
treed1080f99275550cc5dd3656ce4bbde6e0f938471 /include
parent45b8b34dfacb14503d6f8692fa450f81175328e6 (diff)
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Add i.MX7 missing TZ devices and memory regions
* Add TZASC as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add CSU as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add various memory segments - OCRAM - OCRAM EPDC - OCRAM PXP - OCRAM S - ROM - CAAM Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: f887a3483996ba06d40bd62ffdfb0ecf68621987.1692964892.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/arm/fsl-imx7.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
index 06b2c5e..01e1500 100644
--- a/include/hw/arm/fsl-imx7.h
+++ b/include/hw/arm/fsl-imx7.h
@@ -84,6 +84,13 @@ struct FslIMX7State {
IMX7GPRState gpr;
ChipideaState usb[FSL_IMX7_NUM_USBS];
DesignwarePCIEHost pcie;
+ MemoryRegion rom;
+ MemoryRegion caam;
+ MemoryRegion ocram;
+ MemoryRegion ocram_epdc;
+ MemoryRegion ocram_pxp;
+ MemoryRegion ocram_s;
+
uint32_t phy_num[FSL_IMX7_NUM_ETHS];
bool phy_connected[FSL_IMX7_NUM_ETHS];
};