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| author | Tong Ho <tong.ho@xilinx.com> | 2021-09-16 22:23:57 -0700 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-30 13:42:10 +0100 |
| commit | 5f4910ff12f88f9750608cbfe07895204405bed1 (patch) | |
| tree | bdeb7ca7cf98de04b4aaee3e7a33e1226c561a3b /include | |
| parent | 393185bc9de599d82725c2a17d5db91d037745be (diff) | |
| download | qemu-5f4910ff12f88f9750608cbfe07895204405bed1.zip qemu-5f4910ff12f88f9750608cbfe07895204405bed1.tar.gz qemu-5f4910ff12f88f9750608cbfe07895204405bed1.tar.bz2 | |
hw/arm: xlnx-versal-virt: Add Xilinx eFUSE device
Connect the support for Versal eFUSE one-time field-programmable
bit array.
The command argument:
-drive if=pflash,index=1,...
Can be used to optionally connect the bit array to a
backend storage, such that field-programmed values
in one invocation can be made available to next
invocation.
The backend storage must be a seekable binary file, and
its size must be 3072 bytes or larger. A file with all
binary 0's is a 'blank'.
Signed-off-by: Tong Ho <tong.ho@xilinx.com>
Message-id: 20210917052400.1249094-7-tong.ho@xilinx.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/arm/xlnx-versal.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 1cac613..895ba12 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -25,6 +25,7 @@ #include "hw/usb/xlnx-usb-subsystem.h" #include "hw/misc/xlnx-versal-xramc.h" #include "hw/nvram/xlnx-bbram.h" +#include "hw/nvram/xlnx-versal-efuse.h" #define TYPE_XLNX_VERSAL "xlnx-versal" OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL) @@ -81,6 +82,9 @@ struct Versal { XlnxZynqMPRTC rtc; XlnxBBRam bbram; + XlnxEFuse efuse; + XlnxVersalEFuseCtrl efuse_ctrl; + XlnxVersalEFuseCache efuse_cache; } pmc; struct { @@ -110,6 +114,7 @@ struct Versal { #define VERSAL_BBRAM_APB_IRQ_0 121 #define VERSAL_RTC_APB_ERR_IRQ 121 #define VERSAL_SD0_IRQ_0 126 +#define VERSAL_EFUSE_IRQ 139 #define VERSAL_RTC_ALARM_IRQ 142 #define VERSAL_RTC_SECONDS_IRQ 143 @@ -177,6 +182,11 @@ struct Versal { #define MM_PMC_SD0_SIZE 0x10000 #define MM_PMC_BBRAM_CTRL 0xf11f0000 #define MM_PMC_BBRAM_CTRL_SIZE 0x00050 +#define MM_PMC_EFUSE_CTRL 0xf1240000 +#define MM_PMC_EFUSE_CTRL_SIZE 0x00104 +#define MM_PMC_EFUSE_CACHE 0xf1250000 +#define MM_PMC_EFUSE_CACHE_SIZE 0x00C00 + #define MM_PMC_CRP 0xf1260000U #define MM_PMC_CRP_SIZE 0x10000 #define MM_PMC_RTC 0xf12a0000 |