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| author | Harsh Prateek Bora <harshpb@linux.ibm.com> | 2024-01-24 10:30:55 +1000 |
|---|---|---|
| committer | Nicholas Piggin <npiggin@gmail.com> | 2024-02-23 23:24:42 +1000 |
| commit | 2df5c1f5b014126595a26c6797089d284a3b211c (patch) | |
| tree | f9c64e599e5d8b16a265545d5ede4d60421ae6f3 /include | |
| parent | 6c568998f3da5dbd27befe781b5e4e742bbaad54 (diff) | |
| download | qemu-2df5c1f5b014126595a26c6797089d284a3b211c.zip qemu-2df5c1f5b014126595a26c6797089d284a3b211c.tar.gz qemu-2df5c1f5b014126595a26c6797089d284a3b211c.tar.bz2 | |
ppc/spapr: Introduce SPAPR_IRQ_NR_IPIS to refer IRQ range for CPU IPIs.
spapr_irq_init currently uses existing macro SPAPR_XIRQ_BASE to refer to
the range of CPU IPIs during initialization of nr-irqs property.
It is more appropriate to have its own define which can be further
reused as appropriate for correct interpretation.
Suggested-by: Cedric Le Goater <clg@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Tested-by: Kowshik Jois <kowsjois@linux.ibm.com>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/ppc/spapr_irq.h | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index c22a72c..4fd2d58 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -14,9 +14,21 @@ #include "qom/object.h" /* - * IRQ range offsets per device type + * The XIVE IRQ backend uses the same layout as the XICS backend but + * covers the full range of the IRQ number space. The IRQ numbers for + * the CPU IPIs are allocated at the bottom of this space, below 4K, + * to preserve compatibility with XICS which does not use that range. + */ + +/* + * CPU IPI range (XIVE only) */ #define SPAPR_IRQ_IPI 0x0 +#define SPAPR_IRQ_NR_IPIS 0x1000 + +/* + * IRQ range offsets per device type + */ #define SPAPR_XIRQ_BASE XICS_IRQ_BASE /* 0x1000 */ #define SPAPR_IRQ_EPOW (SPAPR_XIRQ_BASE + 0x0000) |