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authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2017-12-21 07:32:57 +0000
committerMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2018-01-09 21:31:31 +0000
commit2a4d6af51b8330bfd7a7dd677927b8dd2f5f5f08 (patch)
tree44e3915a4ff2705b9ae35cd7c08680359f02ef2c /include
parent588978c0a1e9f5596a12d124b530bdf698ed9104 (diff)
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apb: use gpios to wire up the apb device to the SPARC CPU IRQs
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
Diffstat (limited to 'include')
-rw-r--r--include/hw/pci-host/apb.h6
-rw-r--r--include/hw/sparc/sparc64.h2
2 files changed, 6 insertions, 2 deletions
diff --git a/include/hw/pci-host/apb.h b/include/hw/pci-host/apb.h
index a4ef51a..f7ead68 100644
--- a/include/hw/pci-host/apb.h
+++ b/include/hw/pci-host/apb.h
@@ -50,6 +50,8 @@ typedef struct IOMMUState {
uint64_t regs[IOMMU_NREGS];
} IOMMUState;
+#define MAX_IVEC 0x40
+
#define TYPE_APB "pbm"
#define APB_DEVICE(obj) \
@@ -71,7 +73,7 @@ typedef struct APBState {
uint32_t pci_err_irq_map[4];
uint32_t obio_irq_map[32];
qemu_irq *pbm_irqs;
- qemu_irq *ivec_irqs;
+ qemu_irq ivec_irqs[MAX_IVEC];
unsigned int irq_request;
uint32_t reset_control;
unsigned int nr_resets;
@@ -91,5 +93,5 @@ typedef struct PBMPCIBridge {
APBState *pci_apb_init(hwaddr special_base,
hwaddr mem_base,
- qemu_irq *ivec_irqs, PCIBus **bus2, PCIBus **bus3);
+ PCIBus **bus2, PCIBus **bus3);
#endif
diff --git a/include/hw/sparc/sparc64.h b/include/hw/sparc/sparc64.h
index ca3bb4b..5af4344 100644
--- a/include/hw/sparc/sparc64.h
+++ b/include/hw/sparc/sparc64.h
@@ -1,4 +1,6 @@
+#define IVEC_MAX 0x40
+
SPARCCPU *sparc64_cpu_devinit(const char *cpu_type, uint64_t prom_addr);
void sparc64_cpu_set_ivec_irq(void *opaque, int irq, int level);