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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-09-21 13:58:09 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-09-21 13:58:09 +0100 |
| commit | 1c81a38c5ae0c4275b5472f690b76c194a03dee8 (patch) | |
| tree | 80d84df788d0705f2c0f69a1639cf0993175fe02 /include | |
| parent | 326ff8dd09556fc2e257196c49f35009700794ac (diff) | |
| parent | febbe308bf9477767ca92e8ed5f265b0001fcef9 (diff) | |
| download | qemu-1c81a38c5ae0c4275b5472f690b76c194a03dee8.zip qemu-1c81a38c5ae0c4275b5472f690b76c194a03dee8.tar.gz qemu-1c81a38c5ae0c4275b5472f690b76c194a03dee8.tar.bz2 | |
Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210920' into staging
Aspeed patches :
* MAC enablement fixes (Guenter)
* Watchdog and pca9552 fixes (Andrew)
* GPIO fixes (Joel)
* AST2600A3 SoC and DPS310 models (Joel)
* New Fuji BMC machine (Peter)
# gpg: Signature made Mon 20 Sep 2021 07:51:23 BST
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* remotes/legoater/tags/pull-aspeed-20210920:
hw/arm/aspeed: Add Fuji machine type
hw/arm/aspeed: Allow machine to set UART default
hw/arm/aspeed: Initialize AST2600 UART clock selection registers
arm/aspeed: Add DPS310 to Witherspoon and Rainier
hw/misc: Add Infineon DPS310 sensor model
aspeed: Emulate the AST2600A3
arm/aspeed: rainier: Add i2c eeproms and muxes
misc/pca9552: Fix LED status register indexing in pca955x_get_led()
hw: aspeed_gpio: Clarify GPIO controller name
hw: aspeed_gpio: Simplify 1.8V defines
watchdog: aspeed: Fix sequential control writes
watchdog: aspeed: Sanitize control register values
hw: arm: aspeed: Enable mac0/1 instead of mac1/2 for g220a
hw: arm: aspeed: Enable eth0 interface for aspeed-ast2600-evb
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/arm/aspeed.h | 1 | ||||
| -rw-r--r-- | include/hw/arm/aspeed_soc.h | 1 | ||||
| -rw-r--r-- | include/hw/misc/aspeed_scu.h | 2 | ||||
| -rw-r--r-- | include/hw/watchdog/wdt_aspeed.h | 1 |
4 files changed, 5 insertions, 0 deletions
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h index c9747b1..cbeacb2 100644 --- a/include/hw/arm/aspeed.h +++ b/include/hw/arm/aspeed.h @@ -38,6 +38,7 @@ struct AspeedMachineClass { uint32_t num_cs; uint32_t macs_mask; void (*i2c_init)(AspeedMachineState *bmc); + uint32_t uart_default; }; diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index d9161d2..87d76c9 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -65,6 +65,7 @@ struct AspeedSoCState { AspeedSDHCIState sdhci; AspeedSDHCIState emmc; AspeedLPCState lpc; + uint32_t uart_default; }; #define TYPE_ASPEED_SOC "aspeed-soc" diff --git a/include/hw/misc/aspeed_scu.h b/include/hw/misc/aspeed_scu.h index d49bfb0..c14aff2 100644 --- a/include/hw/misc/aspeed_scu.h +++ b/include/hw/misc/aspeed_scu.h @@ -43,6 +43,8 @@ struct AspeedSCUState { #define AST2500_A1_SILICON_REV 0x04010303U #define AST2600_A0_SILICON_REV 0x05000303U #define AST2600_A1_SILICON_REV 0x05010303U +#define AST2600_A2_SILICON_REV 0x05020303U +#define AST2600_A3_SILICON_REV 0x05030303U #define ASPEED_IS_AST2500(si_rev) ((((si_rev) >> 24) & 0xff) == 0x04) diff --git a/include/hw/watchdog/wdt_aspeed.h b/include/hw/watchdog/wdt_aspeed.h index 80b03661..f945cd6 100644 --- a/include/hw/watchdog/wdt_aspeed.h +++ b/include/hw/watchdog/wdt_aspeed.h @@ -44,6 +44,7 @@ struct AspeedWDTClass { uint32_t reset_ctrl_reg; void (*reset_pulse)(AspeedWDTState *s, uint32_t property); void (*wdt_reload)(AspeedWDTState *s); + uint64_t (*sanitize_ctrl)(uint64_t data); }; #endif /* WDT_ASPEED_H */ |