diff options
| author | Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> | 2022-05-28 10:02:11 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2022-06-11 11:44:20 +0200 |
| commit | 19eb2a0da272289e8879fb2780522f37630ac651 (patch) | |
| tree | 26006fa37f48932765ac22e250135461d4795fc0 /include | |
| parent | 2bfd0845f076fbec9e1dc17b1f4630b46a401a8a (diff) | |
| download | qemu-19eb2a0da272289e8879fb2780522f37630ac651.zip qemu-19eb2a0da272289e8879fb2780522f37630ac651.tar.gz qemu-19eb2a0da272289e8879fb2780522f37630ac651.tar.bz2 | |
hw/acpi/piix4: alter piix4_pm_init() to return PIIX4PMState
This exposes the PIIX4_PM device to the caller to allow any qdev gpios to be
mapped outside of piix4_pm_init().
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220528091934.15520-6-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Bernhard Beschow <shentey@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/hw/southbridge/piix.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 04cbc3f..a362ec7 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -14,10 +14,11 @@ #include "hw/pci/pci.h" #include "qom/object.h" +#include "hw/acpi/piix4.h" -I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, - qemu_irq sci_irq, qemu_irq smi_irq, - bool smm_enabled, DeviceState **piix4_pm); +PIIX4PMState *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, + qemu_irq sci_irq, qemu_irq smi_irq, + bool smm_enabled); /* PIRQRC[A:D]: PIRQx Route Control Registers */ #define PIIX_PIRQCA 0x60 |