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authorAlistair Francis <alistair.francis@wdc.com>2022-04-28 09:41:43 +1000
committerAlistair Francis <alistair.francis@wdc.com>2022-04-29 10:48:31 +1000
commit1832b7cb3f6450c2c98e5181c7688b8e753fe7fd (patch)
treeb67b7fbb563aad491fd1ed92383e0211830be7cc /include
parentd24a7bc24ec9201357f554f590d247582360e3cf (diff)
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hw/riscv: virt: Create a platform bus
Create a platform bus to allow dynamic devices to be connected. This is based on the ARM implementation. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20220427234146.1130752-4-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include')
-rw-r--r--include/hw/riscv/virt.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
index 8b8db3f..984e55c 100644
--- a/include/hw/riscv/virt.h
+++ b/include/hw/riscv/virt.h
@@ -46,6 +46,7 @@ struct RISCVVirtState {
/*< public >*/
Notifier machine_done;
+ DeviceState *platform_bus_dev;
RISCVHartArrayState soc[VIRT_SOCKETS_MAX];
DeviceState *irqchip[VIRT_SOCKETS_MAX];
PFlashCFI01 *flash[2];
@@ -76,6 +77,7 @@ enum {
VIRT_DRAM,
VIRT_PCIE_MMIO,
VIRT_PCIE_PIO,
+ VIRT_PLATFORM_BUS,
VIRT_PCIE_ECAM
};
@@ -85,9 +87,12 @@ enum {
VIRTIO_IRQ = 1, /* 1 to 8 */
VIRTIO_COUNT = 8,
PCIE_IRQ = 0x20, /* 32 to 35 */
- VIRTIO_NDEV = 0x35 /* Arbitrary maximum number of interrupts */
+ VIRT_PLATFORM_BUS_IRQ = 64, /* 64 to 96 */
+ VIRTIO_NDEV = 96 /* Arbitrary maximum number of interrupts */
};
+#define VIRT_PLATFORM_BUS_NUM_IRQS 32
+
#define VIRT_IRQCHIP_IPI_MSI 1
#define VIRT_IRQCHIP_NUM_MSIS 255
#define VIRT_IRQCHIP_NUM_SOURCES VIRTIO_NDEV