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authorRichard Henderson <richard.henderson@linaro.org>2022-06-27 05:21:05 +0530
committerRichard Henderson <richard.henderson@linaro.org>2022-06-27 05:21:05 +0530
commit097ccbbbaf2681df1e65542e5b7d2b2d0c66e2bc (patch)
tree5facee76ab537471ab171145a61370817932c599 /include
parent40d522490714b65e0856444277db6c14c5cc3796 (diff)
parent39fbaeca096a9bf6cbe2af88572c1cb2aa62aa8c (diff)
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Merge tag 'qemu-sparc-20220626' of https://github.com/mcayland/qemu into staging
qemu-sparc queue # -----BEGIN PGP SIGNATURE----- # # iQFSBAABCgA8FiEEzGIauY6CIA2RXMnEW8LFb64PMh8FAmK4moUeHG1hcmsuY2F2 # ZS1heWxhbmRAaWxhbmRlLmNvLnVrAAoJEFvCxW+uDzIfaXsH/0+FT9TbHXCplB8h # gvOETq9r5UscYMqUIbRPv7eFIhhZUfq4mCzpthZHYfMA6Tag0jMqaP5ymATm6Jm/ # GgS/7Fx+14uO54Cu4NwIFylRuDt39cESrBHrVjmXmYzOXx7a040+TPxtHHwSRXiQ # Vvx5Oo0P8qQfADQe/Y9iray3JBdFMg4yejO37yrdfP58Nh2dzr9dNKw6apY8dwcv # eTVTqVbYY5AAKOjStpxb0x8dFq/WXttclbeaiSZsK1wnuqhJdUtiMY3UaAfYdMEW # kputMhTZqV/oopUY0mHmBEUK843s8bSQs2aoCSXLamGTWcrm27XNOsX0f4AYwf/y # jWBcSvg= # =0MrK # -----END PGP SIGNATURE----- # gpg: Signature made Sun 26 Jun 2022 11:12:29 PM +0530 # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * tag 'qemu-sparc-20220626' of https://github.com/mcayland/qemu: (55 commits) artist: set memory region owners for buffers to the artist device ps2: remove update_irq() function and update_arg parameter pckbd: add QEMU interface comment for I8042 device pckbd: switch I8042 device from update_irq() function to PS2 device gpio pckbd: add i8042_reset() function to I8042 device pckbd: add QEMU interface comment for I8042_MMIO device pckbd: switch I8042_MMIO device from update_irq() function to PS2 device gpio lasips2: add QEMU interface comment lasips2: switch over from update_irq() function to PS2 device gpio lasips2: use sysbus IRQ for output IRQ lasips2: implement lasips2_realize() lasips2: add base property lasips2: move initialisation of PS2 ports from lasi_initfn() to lasi_init() lasips2: move mapping of LASIPS2 registers to HPPA machine lasips2: implement lasips2_init() function lasips2: rename lasips2_init() to lasips2_initfn() and update it to return the LASIPS2 device lasips2: move lasips2 QOM types from lasips2.c to lasips2.h lasips2: QOMify LASIPS2State pl050: add QEMU interface comment pl050: switch over from update_irq() function to PS2 device gpio ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/hw/input/i8042.h75
-rw-r--r--include/hw/input/lasips2.h39
-rw-r--r--include/hw/input/ps2.h79
3 files changed, 181 insertions, 12 deletions
diff --git a/include/hw/input/i8042.h b/include/hw/input/i8042.h
index e070f54..ca933d8 100644
--- a/include/hw/input/i8042.h
+++ b/include/hw/input/i8042.h
@@ -9,17 +9,86 @@
#define HW_INPUT_I8042_H
#include "hw/isa/isa.h"
+#include "hw/sysbus.h"
#include "qom/object.h"
+#define I8042_KBD_IRQ 0
+#define I8042_MOUSE_IRQ 1
+
+typedef struct KBDState {
+ uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
+ uint8_t status;
+ uint8_t mode;
+ uint8_t outport;
+ uint32_t migration_flags;
+ uint32_t obsrc;
+ bool outport_present;
+ bool extended_state;
+ bool extended_state_loaded;
+ /* Bitmask of devices with data available. */
+ uint8_t pending;
+ uint8_t obdata;
+ uint8_t cbdata;
+ uint8_t pending_tmp;
+ void *kbd;
+ void *mouse;
+ QEMUTimer *throttle_timer;
+
+ qemu_irq irqs[2];
+ qemu_irq a20_out;
+ hwaddr mask;
+} KBDState;
+
+/*
+ * QEMU interface:
+ * + Named GPIO input "ps2-kbd-input-irq": set to 1 if the downstream PS2
+ * keyboard device has asserted its irq
+ * + Named GPIO input "ps2-mouse-input-irq": set to 1 if the downstream PS2
+ * mouse device has asserted its irq
+ * + Named GPIO output "a20": A20 line for x86 PCs
+ * + Unnamed GPIO output 0-1: i8042 output irqs for keyboard (0) or mouse (1)
+ */
+
#define TYPE_I8042 "i8042"
OBJECT_DECLARE_SIMPLE_TYPE(ISAKBDState, I8042)
+struct ISAKBDState {
+ ISADevice parent_obj;
+
+ KBDState kbd;
+ bool kbd_throttle;
+ MemoryRegion io[2];
+ uint8_t kbd_irq;
+ uint8_t mouse_irq;
+};
+
+/*
+ * QEMU interface:
+ * + sysbus MMIO region 0: MemoryRegion defining the command/status/data
+ * registers (access determined by mask property and access type)
+ * + Named GPIO input "ps2-kbd-input-irq": set to 1 if the downstream PS2
+ * keyboard device has asserted its irq
+ * + Named GPIO input "ps2-mouse-input-irq": set to 1 if the downstream PS2
+ * mouse device has asserted its irq
+ * + Unnamed GPIO output 0-1: i8042 output irqs for keyboard (0) or mouse (1)
+ */
+
+#define TYPE_I8042_MMIO "i8042-mmio"
+OBJECT_DECLARE_SIMPLE_TYPE(MMIOKBDState, I8042_MMIO)
+
+struct MMIOKBDState {
+ SysBusDevice parent_obj;
+
+ KBDState kbd;
+ uint32_t size;
+ MemoryRegion region;
+};
+
#define I8042_A20_LINE "a20"
-void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
- MemoryRegion *region, ram_addr_t size,
- hwaddr mask);
+MMIOKBDState *i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
+ ram_addr_t size, hwaddr mask);
void i8042_isa_mouse_fake_event(ISAKBDState *isa);
void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out);
diff --git a/include/hw/input/lasips2.h b/include/hw/input/lasips2.h
index 0cd7b59..03f0c9e 100644
--- a/include/hw/input/lasips2.h
+++ b/include/hw/input/lasips2.h
@@ -4,13 +4,50 @@
* Copyright (c) 2019 Sven Schnelle
*
*/
+
+/*
+ * QEMU interface:
+ * + sysbus MMIO region 0: MemoryRegion defining the LASI PS2 keyboard
+ * registers
+ * + sysbus MMIO region 1: MemoryRegion defining the LASI PS2 mouse
+ * registers
+ * + sysbus IRQ 0: LASI PS2 output irq
+ * + Named GPIO input "ps2-kbd-input-irq": set to 1 if the downstream PS2
+ * keyboard device has asserted its irq
+ * + Named GPIO input "ps2-mouse-input-irq": set to 1 if the downstream PS2
+ * mouse device has asserted its irq
+ */
+
#ifndef HW_INPUT_LASIPS2_H
#define HW_INPUT_LASIPS2_H
#include "exec/hwaddr.h"
+#include "hw/sysbus.h"
+
+struct LASIPS2State;
+typedef struct LASIPS2Port {
+ struct LASIPS2State *parent;
+ MemoryRegion reg;
+ void *dev;
+ uint8_t id;
+ uint8_t control;
+ uint8_t buf;
+ bool loopback_rbne;
+ bool irq;
+} LASIPS2Port;
+
+struct LASIPS2State {
+ SysBusDevice parent_obj;
+
+ hwaddr base;
+ LASIPS2Port kbd;
+ LASIPS2Port mouse;
+ qemu_irq irq;
+};
#define TYPE_LASIPS2 "lasips2"
+OBJECT_DECLARE_SIMPLE_TYPE(LASIPS2State, LASIPS2)
-void lasips2_init(MemoryRegion *address_space, hwaddr base, qemu_irq irq);
+LASIPS2State *lasips2_initfn(hwaddr base, qemu_irq irq);
#endif /* HW_INPUT_LASIPS2_H */
diff --git a/include/hw/input/ps2.h b/include/hw/input/ps2.h
index 35d9838..a78619d 100644
--- a/include/hw/input/ps2.h
+++ b/include/hw/input/ps2.h
@@ -25,28 +25,91 @@
#ifndef HW_PS2_H
#define HW_PS2_H
+#include "hw/sysbus.h"
+
#define PS2_MOUSE_BUTTON_LEFT 0x01
#define PS2_MOUSE_BUTTON_RIGHT 0x02
#define PS2_MOUSE_BUTTON_MIDDLE 0x04
#define PS2_MOUSE_BUTTON_SIDE 0x08
#define PS2_MOUSE_BUTTON_EXTRA 0x10
-typedef struct PS2State PS2State;
+struct PS2DeviceClass {
+ SysBusDeviceClass parent_class;
+
+ DeviceReset parent_reset;
+};
+
+/*
+ * PS/2 buffer size. Keep 256 bytes for compatibility with
+ * older QEMU versions.
+ */
+#define PS2_BUFFER_SIZE 256
+
+typedef struct {
+ uint8_t data[PS2_BUFFER_SIZE];
+ int rptr, wptr, cwptr, count;
+} PS2Queue;
+
+/* Output IRQ */
+#define PS2_DEVICE_IRQ 0
+
+struct PS2State {
+ SysBusDevice parent_obj;
+
+ PS2Queue queue;
+ int32_t write_cmd;
+ qemu_irq irq;
+};
+
+#define TYPE_PS2_DEVICE "ps2-device"
+OBJECT_DECLARE_TYPE(PS2State, PS2DeviceClass, PS2_DEVICE)
+
+struct PS2KbdState {
+ PS2State parent_obj;
+
+ int scan_enabled;
+ int translate;
+ int scancode_set; /* 1=XT, 2=AT, 3=PS/2 */
+ int ledstate;
+ bool need_high_bit;
+ unsigned int modifiers; /* bitmask of MOD_* constants above */
+};
+
+#define TYPE_PS2_KBD_DEVICE "ps2-kbd"
+OBJECT_DECLARE_SIMPLE_TYPE(PS2KbdState, PS2_KBD_DEVICE)
+
+struct PS2MouseState {
+ PS2State parent_obj;
+
+ uint8_t mouse_status;
+ uint8_t mouse_resolution;
+ uint8_t mouse_sample_rate;
+ uint8_t mouse_wrap;
+ uint8_t mouse_type; /* 0 = PS2, 3 = IMPS/2, 4 = IMEX */
+ uint8_t mouse_detect_state;
+ int mouse_dx; /* current values, needed for 'poll' mode */
+ int mouse_dy;
+ int mouse_dz;
+ int mouse_dw;
+ uint8_t mouse_buttons;
+};
+
+#define TYPE_PS2_MOUSE_DEVICE "ps2-mouse"
+OBJECT_DECLARE_SIMPLE_TYPE(PS2MouseState, PS2_MOUSE_DEVICE)
/* ps2.c */
-void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
-void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
-void ps2_write_mouse(void *, int val);
-void ps2_write_keyboard(void *, int val);
+void *ps2_kbd_init(void);
+void *ps2_mouse_init(void);
+void ps2_write_mouse(PS2MouseState *s, int val);
+void ps2_write_keyboard(PS2KbdState *s, int val);
uint32_t ps2_read_data(PS2State *s);
void ps2_queue_noirq(PS2State *s, int b);
-void ps2_raise_irq(PS2State *s);
void ps2_queue(PS2State *s, int b);
void ps2_queue_2(PS2State *s, int b1, int b2);
void ps2_queue_3(PS2State *s, int b1, int b2, int b3);
void ps2_queue_4(PS2State *s, int b1, int b2, int b3, int b4);
-void ps2_keyboard_set_translation(void *opaque, int mode);
-void ps2_mouse_fake_event(void *opaque);
+void ps2_keyboard_set_translation(PS2KbdState *s, int mode);
+void ps2_mouse_fake_event(PS2MouseState *s);
int ps2_queue_empty(PS2State *s);
#endif /* HW_PS2_H */